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| version 1.36, 2005/02/16 09:31:55 | version 1.38, 2005/05/20 13:59:47 |
|---|---|
| Line 156 void gdc_analogext(BOOL extend) { | Line 156 void gdc_analogext(BOOL extend) { |
| } | } |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; |
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); |
| } | } |
| #endif | #endif |
| Line 490 static void IOOUTCALL gdc_o6a(UINT port, | Line 490 static void IOOUTCALL gdc_o6a(UINT port, |
| REG8 bit; | REG8 bit; |
| TRACEOUT(("port:%.4x %.2x", port, dat)); | |
| if (!(dat & 0xf8)) { | if (!(dat & 0xf8)) { |
| bit = (dat >> 1) & 3; | bit = (dat >> 1) & 3; |
| dat &= 1; | dat &= 1; |
| Line 507 static void IOOUTCALL gdc_o6a(UINT port, | Line 505 static void IOOUTCALL gdc_o6a(UINT port, |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| vramop.operate &= ~(1 << VOPBIT_ANALOG); | vramop.operate &= ~(1 << VOPBIT_ANALOG); |
| vramop.operate |= dat << VOPBIT_ANALOG; | vramop.operate |= dat << VOPBIT_ANALOG; |
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); |
| } | } |
| break; | break; |
| Line 515 static void IOOUTCALL gdc_o6a(UINT port, | Line 513 static void IOOUTCALL gdc_o6a(UINT port, |
| if ((gdc.mode2 & 0x08) && (grcg.chip == 3)) { | if ((gdc.mode2 & 0x08) && (grcg.chip == 3)) { |
| vramop.operate &= ~(1 << VOPBIT_EGC); | vramop.operate &= ~(1 << VOPBIT_EGC); |
| vramop.operate |= dat << VOPBIT_EGC; | vramop.operate |= dat << VOPBIT_EGC; |
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); |
| } | } |
| break; | break; |
| } | } |
| Line 627 static REG8 IOINPCALL gdc_i60(UINT port) | Line 625 static REG8 IOINPCALL gdc_i60(UINT port) |
| UINT16 memv; | UINT16 memv; |
| addr = CPU_INPADRS; | addr = CPU_INPADRS; |
| jadr = 0xfa74; | jadr = 0xfa74; |
| memv = i286_memoryread_w(addr); | memv = MEML_READ16(addr); |
| while((memv == 0x00eb) || (memv == 0x5fe6)) { | while((memv == 0x00eb) || (memv == 0x5fe6)) { |
| jadr -= 0x200; | jadr -= 0x200; |
| addr += 2; | addr += 2; |
| memv = i286_memoryread_w(addr); | memv = MEML_READ16(addr); |
| } | } |
| if ((memv == 0x20a8) || (memv == 0x2024)) { | if ((memv == 0x20a8) || (memv == 0x2024)) { |
| memv = i286_memoryread_w(addr + 2); | memv = MEML_READ16(addr + 2); |
| if (memv == jadr) { // je | if (memv == jadr) { // je |
| if (!gdc.vsync) { | if (!gdc.vsync) { |
| CPU_REMCLOCK = -1; | CPU_REMCLOCK = -1; |
| Line 720 static void IOOUTCALL gdc_oa6(UINT port, | Line 718 static void IOOUTCALL gdc_oa6(UINT port, |
| gdcs.access = (UINT8)dat; | gdcs.access = (UINT8)dat; |
| vramop.operate &= ~(1 << VOPBIT_ACCESS); | vramop.operate &= ~(1 << VOPBIT_ACCESS); |
| vramop.operate |= dat << VOPBIT_ACCESS; | vramop.operate |= dat << VOPBIT_ACCESS; |
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); |
| } | } |
| (void)port; | (void)port; |
| } | } |
| Line 756 static REG8 IOINPCALL gdc_ia0(UINT port) | Line 754 static REG8 IOINPCALL gdc_ia0(UINT port) |
| UINT16 memv; | UINT16 memv; |
| addr = CPU_INPADRS; | addr = CPU_INPADRS; |
| jadr = 0xfa74; | jadr = 0xfa74; |
| memv = i286_memoryread_w(addr); | memv = MEML_READ16(addr); |
| while((memv == 0x00eb) || (memv == 0x5fe6)) { | while((memv == 0x00eb) || (memv == 0x5fe6)) { |
| jadr -= 0x200; | jadr -= 0x200; |
| addr += 2; | addr += 2; |
| memv = i286_memoryread_w(addr); | memv = MEML_READ16(addr); |
| } | } |
| if ((memv == 0x20a8) || (memv == 0x2024)) { | if ((memv == 0x20a8) || (memv == 0x2024)) { |
| memv = i286_memoryread_w(addr + 2); | memv = MEML_READ16(addr + 2); |
| if (memv == jadr) { // je | if (memv == jadr) { // je |
| if (!gdc.vsync) { | if (!gdc.vsync) { |
| CPU_REMCLOCK = -1; | CPU_REMCLOCK = -1; |
| Line 938 static REG8 IOINPCALL gdc_iae(UINT port) | Line 936 static REG8 IOINPCALL gdc_iae(UINT port) |
| #if defined(SUPPORT_PC9821) | #if defined(SUPPORT_PC9821) |
| static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) { | static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) { |
| TRACEOUT(("port:%.4x,%.2x", port, dat)); | |
| gdc.ff2 = dat; | gdc.ff2 = dat; |
| (void)port; | (void)port; |
| } | } |
| Line 1090 void gdc_biosreset(void) { | Line 1087 void gdc_biosreset(void) { |
| gdcs.access = 0; | gdcs.access = 0; |
| gdc.analog &= ~(1 << GDCANALOG_16); | gdc.analog &= ~(1 << GDCANALOG_16); |
| gdcs.palchange = GDCSCRN_REDRAW; | gdcs.palchange = GDCSCRN_REDRAW; |
| gdc.mode2 &= ~(1 << 0); | |
| gdc.mode2 &= ~(1 << 2); | |
| gdc.mode2 &= ~(1 << 3); | |
| gdcs.mode2 = gdc.mode2; | |
| vramop.operate &= ~(1 << VOPBIT_ACCESS); | vramop.operate &= ~(1 << VOPBIT_ACCESS); |
| vramop.operate &= ~(1 << VOPBIT_EGC); | vramop.operate &= ~(1 << VOPBIT_EGC); |
| vramop.operate &= ~(1 << VOPBIT_ANALOG); | vramop.operate &= ~(1 << VOPBIT_ANALOG); |
| Line 1097 void gdc_biosreset(void) { | Line 1100 void gdc_biosreset(void) { |
| gdc.analog &= ~(1 << (GDCANALOG_256)); | gdc.analog &= ~(1 << (GDCANALOG_256)); |
| vramop.operate &= ~(1 << VOPBIT_VGA); | vramop.operate &= ~(1 << VOPBIT_VGA); |
| #endif | #endif |
| i286_vram_dispatch(vramop.operate); | MEMM_VRAM(vramop.operate); |
| // palette | // palette |
| CopyMemory(gdc.degpal, defdegpal, 4); | CopyMemory(gdc.degpal, defdegpal, 4); |