--- np2/io/gdc.c 2004/02/29 00:57:06 1.24 +++ np2/io/gdc.c 2004/03/14 23:45:44 1.29 @@ -9,8 +9,9 @@ #include "palettes.h" #include "timing.h" - +#if !defined(CPUCORE_IA32) #define SEARCH_SYNC +#endif #define TURE_SYNC typedef struct { @@ -122,6 +123,23 @@ void gdc_paletteinit(void) { gdcs.palchange = GDCSCRN_REDRAW; } +#if defined(SUPPORT_PC9821) +void gdc_analogext(BOOL extend) { + + if (extend) { + gdc.analog |= (1 << GDCANALOG_256); + vramop.operate |= 0x20; + } + else { + gdc.analog &= ~(1 << (GDCANALOG_256)); + vramop.operate &= ~0x20; + } + gdcs.palchange = GDCSCRN_REDRAW; + gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2; + i286_vram_dispatch(vramop.operate); +} +#endif + // -------------------------------------------------------------------------- @@ -460,8 +478,8 @@ static void IOOUTCALL gdc_o6a(UINT port, switch(bit) { case 0: if (gdc.display & (1 << GDCDISP_ANALOG)) { - gdc.analog &= ~1; - gdc.analog |= dat; + gdc.analog &= ~(1 << GDCANALOG_16); + gdc.analog |= (dat << GDCANALOG_16); gdcs.palchange = GDCSCRN_REDRAW; vramop.operate &= VOP_ANALOGMASK; vramop.operate |= dat << 4; @@ -481,6 +499,27 @@ static void IOOUTCALL gdc_o6a(UINT port, } else { switch(dat) { +#if defined(SUPPORT_PC9821) + case 0x20: + if (gdc.mode2 & 0x08) { + gdc_analogext(FALSE); + } + break; + + case 0x21: + if (gdc.mode2 & 0x08) { + gdc_analogext(TRUE); + } + break; + + case 0x68: + gdc.analog &= ~(1 << GDCANALOG_256E); + break; + + case 0x69: + gdc.analog |= (1 << GDCANALOG_256E); + break; +#endif case 0x40: case 0x80: // EPSON? gdc.display &= ~(1 << GDCDISP_PLAZMA); @@ -557,18 +596,21 @@ static REG8 IOINPCALL gdc_i60(UINT port) else { gdc_work(GDCWORK_MASTER); } -#ifdef SEARCH_SYNC +#ifdef SEARCH_SYNC // ToDo: フェッチキューを参照するように… if ((CPU_INPADRS) && (CPU_REMCLOCK >= 5)) { - UINT16 jadr = 0xfa74; + UINT32 addr; + UINT16 jadr; UINT16 memv; - memv = i286_memoryread_w(CPU_INPADRS); + addr = CPU_INPADRS; + jadr = 0xfa74; + memv = i286_memoryread_w(addr); while((memv == 0x00eb) || (memv == 0x5fe6)) { jadr -= 0x200; - CPU_INPADRS += 2; - memv = i286_memoryread_w(CPU_INPADRS); + addr += 2; + memv = i286_memoryread_w(addr); } if ((memv == 0x20a8) || (memv == 0x2024)) { - memv = i286_memoryread_w(CPU_INPADRS + 2); + memv = i286_memoryread_w(addr + 2); if (memv == jadr) { // je if (!gdc.vsync) { CPU_REMCLOCK = -1; @@ -684,16 +726,19 @@ static REG8 IOINPCALL gdc_ia0(UINT port) } #ifdef SEARCH_SYNC if ((CPU_INPADRS) && (CPU_REMCLOCK >= 5)) { - UINT16 jadr = 0xfa74; + UINT32 addr; + UINT16 jadr; UINT16 memv; - memv = i286_memoryread_w(CPU_INPADRS); + addr = CPU_INPADRS; + jadr = 0xfa74; + memv = i286_memoryread_w(addr); while((memv == 0x00eb) || (memv == 0x5fe6)) { jadr -= 0x200; - CPU_INPADRS += 2; - memv = i286_memoryread_w(CPU_INPADRS); + addr += 2; + memv = i286_memoryread_w(addr); } if ((memv == 0x20a8) || (memv == 0x2024)) { - memv = i286_memoryread_w(CPU_INPADRS + 2); + memv = i286_memoryread_w(addr + 2); if (memv == jadr) { // je if (!gdc.vsync) { CPU_REMCLOCK = -1; @@ -743,7 +788,7 @@ static REG8 IOINPCALL gdc_ia6(UINT port) static void IOOUTCALL gdc_oa8(UINT port, REG8 dat) { - if (gdc.analog) { + if (gdc.analog & ((1 << GDCANALOG_256) + (1 << GDCANALOG_16))) { gdc.palnum = dat; } else { @@ -754,7 +799,17 @@ static void IOOUTCALL gdc_oa8(UINT port, static void IOOUTCALL gdc_oaa(UINT port, REG8 dat) { - if (gdc.analog) { +#if defined(SUPPORT_PC9821) + if (gdc.analog & (1 << GDCANALOG_256)) { + gdcs.palchange = GDCSCRN_REDRAW; + gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 0] = dat; + } + else +#endif + if (gdc.analog & (1 << GDCANALOG_16)) { +#if defined(SUPPORT_PC9821) + gdc.anareg[(gdc.palnum * 3) + 2] = dat; +#endif gdc_setanalogpal(gdc.palnum & 15, offsetof(RGB32, p.g), dat); } else { @@ -765,7 +820,17 @@ static void IOOUTCALL gdc_oaa(UINT port, static void IOOUTCALL gdc_oac(UINT port, REG8 dat) { - if (gdc.analog) { +#if defined(SUPPORT_PC9821) + if (gdc.analog & (1 << GDCANALOG_256)) { + gdcs.palchange = GDCSCRN_REDRAW; + gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 1] = dat; + } + else +#endif + if (gdc.analog & (1 << GDCANALOG_16)) { +#if defined(SUPPORT_PC9821) + gdc.anareg[(gdc.palnum * 3) + 2] = dat; +#endif gdc_setanalogpal(gdc.palnum & 15, offsetof(RGB32, p.r), dat); } else { @@ -776,7 +841,17 @@ static void IOOUTCALL gdc_oac(UINT port, static void IOOUTCALL gdc_oae(UINT port, REG8 dat) { - if (gdc.analog) { +#if defined(SUPPORT_PC9821) + if (gdc.analog & (1 << GDCANALOG_256)) { + gdcs.palchange = GDCSCRN_REDRAW; + gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 2] = dat; + } + else +#endif + if (gdc.analog & (1 << GDCANALOG_16)) { +#if defined(SUPPORT_PC9821) + gdc.anareg[(gdc.palnum * 3) + 2] = dat; +#endif gdc_setanalogpal(gdc.palnum & 15, offsetof(RGB32, p.b), dat); } else { @@ -785,9 +860,70 @@ static void IOOUTCALL gdc_oae(UINT port, (void)port; } +#if defined(SUPPORT_PC9821) +static REG8 IOINPCALL gdc_ia8(UINT port) { + + if (gdc.analog & ((1 << GDCANALOG_256) + (1 << GDCANALOG_16))) { + return(gdc.palnum); + } + (void)port; + return(gdc.degpal[3]); +} + +static REG8 IOINPCALL gdc_iaa(UINT port) { + + if (gdc.analog & (1 << GDCANALOG_256)) { + return(gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 0]); + } + if (gdc.analog & (1 << GDCANALOG_16)) { + return(gdc.anareg[(gdc.palnum * 3) + 2]); + } + (void)port; + return(gdc.degpal[1]); +} + +static REG8 IOINPCALL gdc_iac(UINT port) { + + if (gdc.analog & (1 << GDCANALOG_256)) { + return(gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 1]); + } + if (gdc.analog & (1 << GDCANALOG_16)) { + return(gdc.anareg[(gdc.palnum * 3) + 2]); + } + (void)port; + return(gdc.degpal[2]); +} + +static REG8 IOINPCALL gdc_iae(UINT port) { + + if (gdc.analog & (1 << GDCANALOG_256)) { + return(gdc.anareg[(16 * 3) + (gdc.palnum * 4) + 2]); + } + if (gdc.analog & (1 << GDCANALOG_16)) { + return(gdc.anareg[(gdc.palnum * 3) + 2]); + } + (void)port; + return(gdc.degpal[0]); +} +#endif + // ---- extend +#if defined(SUPPORT_PC9821) +static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) { + + (void)port; + (void)dat; +} + +static REG8 IOINPCALL gdc_i9a0(UINT port) { + + (void)port; + return(0); +} +#endif + #if defined(SUPPORT_CRT31KHZ) static void IOOUTCALL gdc_o9a8(UINT port, REG8 dat) { @@ -820,15 +956,18 @@ static const IOINP gdci60[8] = { gdc_i60, gdc_i62, NULL, NULL, gdc_i68, gdc_i6a, NULL, NULL}; +#if defined(SUPPORT_PC9821) +static const IOINP gdcia0[8] = { + gdc_ia0, gdc_ia2, gdc_ia4, gdc_ia6, + gdc_ia8, gdc_iaa, gdc_iac, gdc_iae}; +#else static const IOINP gdcia0[8] = { gdc_ia0, gdc_ia2, gdc_ia4, gdc_ia6, NULL, NULL, NULL, NULL}; +#endif -void gdc_reset(void) { - - ZeroMemory(&gdc, sizeof(gdc)); - ZeroMemory(&gdcs, sizeof(gdcs)); +void gdc_biosreset(void) { if (!(np2cfg.dipsw[0] & 0x01)) { gdc.mode1 = 0x98; @@ -848,6 +987,9 @@ void gdc_reset(void) { CopyMemory(gdc.m.para + GDC_SYNC, defsyncm15, 8); CopyMemory(gdc.s.para + GDC_SYNC, defsyncs15, 8); } + if (np2cfg.dipsw[0] & 0x80) { + gdc.s.para[GDC_SYNC] = 0x16; + } gdc_vectreset(&gdc.m); gdc_vectreset(&gdc.s); @@ -855,25 +997,50 @@ void gdc_reset(void) { gdc.m.para[GDC_PITCH] = 80; gdc.s.para[GDC_PITCH] = 40; - gdc_paletteinit(); + gdc.bitac = 0xff; + + // vram bank + gdcs.disp = 0; + gdcs.access = 0; + gdc.analog &= ~(1 << GDCANALOG_16); + gdcs.palchange = GDCSCRN_REDRAW; + vramop.operate &= VOP_ACCESSMASK; + vramop.operate &= VOP_EGCMASK; + vramop.operate &= VOP_ANALOGMASK; +#if defined(SUPPORT_PC9821) + gdc.analog &= ~(1 << (GDCANALOG_256)); + vramop.operate &= ~0x20; +#endif + i286_vram_dispatch(vramop.operate); + + gdcs.textdisp = GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; + gdcs.grphdisp = GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; + screenupdate |= 2; +} + +void gdc_reset(void) { + + ZeroMemory(&gdc, sizeof(gdc)); + ZeroMemory(&gdcs, sizeof(gdcs)); if (np2cfg.color16 & 1) { - gdc.s.para[GDC_SYNC] = 0x16; gdc.display = (1 << GDCDISP_ANALOG); } - gdc.bitac = 0xff; - if (!(np2cfg.dipsw[0] & 0x04)) { // dipsw1-3 on gdc.display |= (1 << GDCDISP_PLAZMA2); } - gdcs.textdisp = GDCSCRN_ENABLE | GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; - gdcs.grphdisp = GDCSCRN_ALLDRAW2 | GDCSCRN_EXT; + gdc_biosreset(); + gdc_paletteinit(); } void gdc_bind(void) { gdc_updateclock(); +#if defined(SUPPORT_PC9821) // とりあえずフックだけ + iocore_attachout(0x09a0, gdc_o9a0); + iocore_attachinp(0x09a0, gdc_i9a0); +#endif #if defined(SUPPORT_CRT31KHZ) iocore_attachout(0x09a8, gdc_o9a8); iocore_attachinp(0x09a8, gdc_i9a8);