--- np2/io/gdc.c	2005/02/16 09:31:55	1.36
+++ np2/io/gdc.c	2007/11/03 00:00:20	1.40
@@ -93,7 +93,7 @@ void gdc_setanalogpal(int color, int rgb
 				event = palevent.event + palevent.events;
 				event->clock = nevent.item[NEVENT_FLAMES].clock -
 											(CPU_BASECLOCK - CPU_REMCLOCK);
-				event->color = (color * sizeof(RGB32)) + rgb;
+				event->color = (UINT16)((color * sizeof(RGB32)) + rgb);
 				event->value = (UINT8)value;
 				palevent.events++;
 			}
@@ -156,7 +156,7 @@ void gdc_analogext(BOOL extend) {
 	}
 	gdcs.palchange = GDCSCRN_REDRAW;
 	gdcs.grphdisp |= GDCSCRN_EXT | GDCSCRN_ALLDRAW2;
-	i286_vram_dispatch(vramop.operate);
+	MEMM_VRAM(vramop.operate);
 }
 #endif
 
@@ -490,8 +490,6 @@ static void IOOUTCALL gdc_o6a(UINT port,
 
 	REG8	bit;
 
-	TRACEOUT(("port:%.4x %.2x", port, dat));
-
 	if (!(dat & 0xf8)) {
 		bit = (dat >> 1) & 3;
 		dat &= 1;
@@ -507,7 +505,7 @@ static void IOOUTCALL gdc_o6a(UINT port,
 					gdcs.palchange = GDCSCRN_REDRAW;
 					vramop.operate &= ~(1 << VOPBIT_ANALOG);
 					vramop.operate |= dat << VOPBIT_ANALOG;
-					i286_vram_dispatch(vramop.operate);
+					MEMM_VRAM(vramop.operate);
 				}
 				break;
 
@@ -515,7 +513,7 @@ static void IOOUTCALL gdc_o6a(UINT port,
 				if ((gdc.mode2 & 0x08) && (grcg.chip == 3)) {
 					vramop.operate &= ~(1 << VOPBIT_EGC);
 					vramop.operate |= dat << VOPBIT_EGC;
-					i286_vram_dispatch(vramop.operate);
+					MEMM_VRAM(vramop.operate);
 				}
 				break;
 		}
@@ -627,14 +625,14 @@ static REG8 IOINPCALL gdc_i60(UINT port)
 		UINT16 memv;
 		addr = CPU_INPADRS;
 		jadr = 0xfa74;
-		memv = i286_memoryread_w(addr);
+		memv = MEML_READ16(addr);
 		while((memv == 0x00eb) || (memv == 0x5fe6)) {
 			jadr -= 0x200;
 			addr += 2;
-			memv = i286_memoryread_w(addr);
+			memv = MEML_READ16(addr);
 		}
 		if ((memv == 0x20a8) || (memv == 0x2024)) {
-			memv = i286_memoryread_w(addr + 2);
+			memv = MEML_READ16(addr + 2);
 			if (memv == jadr) {					// je
 				if (!gdc.vsync) {
 					CPU_REMCLOCK = -1;
@@ -720,7 +718,7 @@ static void IOOUTCALL gdc_oa6(UINT port,
 		gdcs.access = (UINT8)dat;
 		vramop.operate &= ~(1 << VOPBIT_ACCESS);
 		vramop.operate |= dat << VOPBIT_ACCESS;
-		i286_vram_dispatch(vramop.operate);
+		MEMM_VRAM(vramop.operate);
 	}
 	(void)port;
 }
@@ -756,14 +754,14 @@ static REG8 IOINPCALL gdc_ia0(UINT port)
 		UINT16 memv;
 		addr = CPU_INPADRS;
 		jadr = 0xfa74;
-		memv = i286_memoryread_w(addr);
+		memv = MEML_READ16(addr);
 		while((memv == 0x00eb) || (memv == 0x5fe6)) {
 			jadr -= 0x200;
 			addr += 2;
-			memv = i286_memoryread_w(addr);
+			memv = MEML_READ16(addr);
 		}
 		if ((memv == 0x20a8) || (memv == 0x2024)) {
-			memv = i286_memoryread_w(addr + 2);
+			memv = MEML_READ16(addr + 2);
 			if (memv == jadr) {					// je
 				if (!gdc.vsync) {
 					CPU_REMCLOCK = -1;
@@ -938,7 +936,6 @@ static REG8 IOINPCALL gdc_iae(UINT port)
 #if defined(SUPPORT_PC9821)
 static void IOOUTCALL gdc_o9a0(UINT port, REG8 dat) {
 
-	TRACEOUT(("port:%.4x,%.2x", port, dat));
 	gdc.ff2 = dat;
 	(void)port;
 }
@@ -1090,6 +1087,12 @@ void gdc_biosreset(void) {
 	gdcs.access = 0;
 	gdc.analog &= ~(1 << GDCANALOG_16);
 	gdcs.palchange = GDCSCRN_REDRAW;
+
+	gdc.mode2 &= ~(1 << 0);
+	gdc.mode2 &= ~(1 << 2);
+	gdc.mode2 &= ~(1 << 3);
+	gdcs.mode2 = gdc.mode2;
+
 	vramop.operate &= ~(1 << VOPBIT_ACCESS);
 	vramop.operate &= ~(1 << VOPBIT_EGC);
 	vramop.operate &= ~(1 << VOPBIT_ANALOG);
@@ -1097,7 +1100,7 @@ void gdc_biosreset(void) {
 	gdc.analog &= ~(1 << (GDCANALOG_256));
 	vramop.operate &= ~(1 << VOPBIT_VGA);
 #endif
-	i286_vram_dispatch(vramop.operate);
+	MEMM_VRAM(vramop.operate);
 
 	// palette
 	CopyMemory(gdc.degpal, defdegpal, 4);
@@ -1126,7 +1129,7 @@ void gdc_biosreset(void) {
 	screenupdate |= 2;
 }
 
-void gdc_reset(void) {
+void gdc_reset(const NP2CFG *pConfig) {
 
 	ZeroMemory(&gdc, sizeof(gdc));
 	ZeroMemory(&gdcs, sizeof(gdcs));
@@ -1142,6 +1145,8 @@ void gdc_reset(void) {
 		gdc.display |= (1 << GDCDISP_PLAZMA2);
 	}
 	gdc_biosreset();
+
+	(void)pConfig;
 }
 
 void gdc_bind(void) {