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| version 1.11, 2004/02/14 07:56:51 | version 1.15, 2004/02/20 15:20:30 |
|---|---|
| Line 20 typedef struct { | Line 20 typedef struct { |
| SINT16 y2; | SINT16 y2; |
| } VECTDIR; | } VECTDIR; |
| const UINT32 gdcplaneseg[4] = {VRAM_E, VRAM_B, VRAM_R, VRAM_G}; | |
| static UINT16 gdc_rt[RT_TABLEMAX+1]; | static UINT16 gdc_rt[RT_TABLEMAX+1]; |
| static const VECTDIR vectdir[16] = { | static const VECTDIR vectdir[16] = { |
| Line 85 REG8 gdcbitreverse(REG8 data) { | Line 87 REG8 gdcbitreverse(REG8 data) { |
| #endif | #endif |
| void gdcsub_init(void) { | void gdcsub_initialize(void) { |
| int i; | int i; |
| Line 107 static void calc_gdcslavewait(UINT dots) | Line 109 static void calc_gdcslavewait(UINT dots) |
| SINT32 clk; | SINT32 clk; |
| clk = dots; | clk = dots; |
| if (pccore.baseclock != PCBASECLOCK20) { | if (pccore.cpumode & CPUMODE_8MHZ) { |
| clk *= 27648; | clk *= 22464; |
| } | } |
| else { | else { |
| clk *= 22464; | clk *= 27648; |
| } | } |
| clk *= pccore.multiple; | clk *= pccore.multiple; |
| clk /= 15625; | clk /= 15625; |
| Line 221 const VECTDIR *dir; | Line 223 const VECTDIR *dir; |
| BYTE mulx; | BYTE mulx; |
| if (vect->ope & 0x80) { // SL | if (vect->ope & 0x80) { // SL |
| pat = (GDCPATREVERSE(pat) << 8) + GDCPATREVERSE(pat >> 8); | pat = (REG16)((GDCPATREVERSE(pat) << 8) + GDCPATREVERSE(pat >> 8)); |
| } | } |
| gdcpset_prepare(&pset, csrw, 0xffff, ope); | gdcpset_prepare(&pset, csrw, 0xffff, ope); |
| multiple = (gdc.s.para[GDC_ZOOM] & 15) + 1; | multiple = (gdc.s.para[GDC_ZOOM] & 15) + 1; |
| Line 546 void gdcsub_write(void) { | Line 548 void gdcsub_write(void) { |
| } | } |
| gdcs.grphdisp |= (BYTE)updatebit; | gdcs.grphdisp |= (BYTE)updatebit; |
| ptr += vramplaneseg[(adrs >> 14) & 3]; | ptr += gdcplaneseg[(adrs >> 14) & 3]; |
| adrs = (adrs & 0x3fff) << 1; | adrs = (adrs & 0x3fff) << 1; |
| calc_gdcslavewait(leng); | calc_gdcslavewait(leng); |