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| version 1.1, 2003/10/16 17:57:56 | version 1.5, 2003/12/28 14:33:34 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "strres.h" | #include "strres.h" |
| #include "taskmng.h" | #include "taskmng.h" |
| #include "i286.h" | #include "cpucore.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "bios.h" | |
| #include "sxsi.h" | |
| // #include "hostdrv.h" | // #include "hostdrv.h" |
| // #include "hostdir.h" | // #include "hostdir.h" |
| Line 64 static void np2sysp_cpu(const void *arg1 | Line 66 static void np2sysp_cpu(const void *arg1 |
| // CPUを返す | // CPUを返す |
| #if 1 // 80286 or V30 | #if 1 // 80286 or V30 |
| if (!(CPUTYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { |
| np2sysp_outstr(str_80286, NULL); | np2sysp_outstr(str_80286, NULL); |
| } | } |
| else { | else { |
| Line 94 static void np2sysp_mul(const void *arg1 | Line 96 static void np2sysp_mul(const void *arg1 |
| (void)arg2; | (void)arg2; |
| } | } |
| typedef struct { | |
| UINT16 r_ax; | |
| UINT16 r_bx; | |
| UINT16 r_cx; | |
| UINT16 r_dx; | |
| UINT16 r_bp; | |
| UINT16 r_es; | |
| } B1BREG; | |
| static void np2sysp_sxsi(const void *arg1, const void *arg2) { | |
| B1BREG org; | |
| UINT32 esbase_org; | |
| B1BREG r; | |
| UINT8 ret; | |
| REG8 flag; | |
| org.r_ax = CPU_AX; | |
| org.r_cx = CPU_CX; | |
| org.r_dx = CPU_DX; | |
| org.r_bx = CPU_BX; | |
| org.r_bp = CPU_BP; | |
| org.r_es = CPU_ES; | |
| esbase_org = ES_BASE; | |
| i286_memstr_read(CPU_SS, CPU_SP, &r, sizeof(r)); | |
| CPU_AX = r.r_ax; | |
| CPU_BX = r.r_bx; | |
| CPU_CX = r.r_cx; | |
| CPU_DX = r.r_dx; | |
| CPU_BP = r.r_bp; | |
| CPU_ES = r.r_es; | |
| ES_BASE = r.r_es << 4; | |
| switch(r.r_ax & 0xf0) { | |
| case 0x00: | |
| case 0x20: | |
| ret = sxsi_operate(HDDTYPE_SASI); | |
| break; | |
| case 0x80: | |
| case 0xa0: | |
| ret = sxsi_operate(HDDTYPE_SCSI); | |
| break; | |
| default: | |
| ret = 0x40; | |
| break; | |
| } | |
| r.r_ax = CPU_AL + (ret << 8); | |
| r.r_bx = CPU_BX; | |
| r.r_cx = CPU_CX; | |
| r.r_dx = CPU_DX; | |
| i286_memstr_write(CPU_SS, CPU_SP, &r, 8); | |
| flag = i286_membyte_read(CPU_SS, CPU_SP + 0x16) & 0xfe; | |
| if (ret >= 0x20) { | |
| flag += 1; | |
| } | |
| i286_membyte_write(CPU_SS, CPU_SP + 0x16, flag); | |
| CPU_AX = org.r_ax; | |
| CPU_CX = org.r_cx; | |
| CPU_DX = org.r_dx; | |
| CPU_BX = org.r_bx; | |
| CPU_BP = org.r_bp; | |
| CPU_ES = org.r_es; | |
| ES_BASE = esbase_org; | |
| } | |
| #if 0 | #if 0 |
| static void np2sysp_hostdrv(const void *arg1, const void *arg2) { | static void np2sysp_hostdrv(const void *arg1, const void *arg2) { |
| Line 121 static const char str_np2[] = "NP2"; | Line 191 static const char str_np2[] = "NP2"; |
| static const char str_ver[] = "ver"; | static const char str_ver[] = "ver"; |
| static const char str_poweroff[] = "poweroff"; | static const char str_poweroff[] = "poweroff"; |
| static const char str_credit[] = "credit"; | static const char str_credit[] = "credit"; |
| static const char str_cpu[] = "credit"; | static const char str_cpu[] = "cpu"; |
| static const char str_clock[] = "clock"; | static const char str_clock[] = "clock"; |
| static const char str_multiple[] = "multiple"; | static const char str_multiple[] = "multiple"; |
| static const char str_sxsibios[] = "sxsibios"; | |
| #if defined(NP2SYSP_VER) | #if defined(NP2SYSP_VER) |
| static const char str_syspver[] = NP2SYSP_VER; | static const char str_syspver[] = NP2SYSP_VER; |
| Line 151 static const SYSPCMD np2spcmd[] = { | Line 222 static const SYSPCMD np2spcmd[] = { |
| {str_clock, np2sysp_clock, NULL, NULL}, | {str_clock, np2sysp_clock, NULL, NULL}, |
| {str_multiple, np2sysp_mul, NULL, NULL}, | {str_multiple, np2sysp_mul, NULL, NULL}, |
| // version:C | |
| {str_sxsibios, np2sysp_sxsi, NULL, NULL}, | |
| #if 0 | #if 0 |
| // hostdrv | // hostdrv |
| {"check_hostdrv", np2sysp_outstr, "supported", | {"check_hostdrv", np2sysp_outstr, "supported", |
| Line 190 static BOOL np2syspcmp(const char *p) { | Line 264 static BOOL np2syspcmp(const char *p) { |
| return(FALSE); | return(FALSE); |
| } | } |
| static void IOOUTCALL np2sysp_o7bf(UINT port, BYTE dat) { | static void IOOUTCALL np2sysp_o7ef(UINT port, REG8 dat) { |
| UINT i; | const SYSPCMD *cmd; |
| const SYSPCMD *cmdterm; | |
| np2sysp.substr[np2sysp.strpos] = dat; | np2sysp.substr[np2sysp.strpos] = (char)dat; |
| for (i=0; i<(sizeof(np2spcmd)/sizeof(SYSPCMD)); i++) { | cmd = np2spcmd; |
| if (!np2syspcmp(np2spcmd[i].key)) { | cmdterm = cmd + (sizeof(np2spcmd) / sizeof(SYSPCMD)); |
| np2spcmd[i].func(np2spcmd[i].arg1, np2spcmd[i].arg2); | while(cmd < cmdterm) { |
| if (!np2syspcmp(cmd->key)) { | |
| cmd->func(cmd->arg1, cmd->arg2); | |
| break; | break; |
| } | } |
| cmd++; | |
| } | } |
| np2sysp.strpos++; | np2sysp.strpos++; |
| np2sysp.strpos &= NP2SYSP_MASK; | np2sysp.strpos &= NP2SYSP_MASK; |
| (void)port; | (void)port; |
| } | } |
| static BYTE IOINPCALL np2sysp_i7bf(UINT port) { | static REG8 IOINPCALL np2sysp_i7ef(UINT port) { |
| BYTE ret; | REG8 ret; |
| ret = np2sysp.outstr[np2sysp.outpos]; | ret = (UINT8)np2sysp.outstr[np2sysp.outpos]; |
| if (ret) { | if (ret) { |
| np2sysp.outpos++; | np2sysp.outpos++; |
| np2sysp.outpos &= NP2SYSP_MASK; | np2sysp.outpos &= NP2SYSP_MASK; |
| Line 229 void np2sysp_reset(void) { | Line 307 void np2sysp_reset(void) { |
| void np2sysp_bind(void) { | void np2sysp_bind(void) { |
| iocore_attachout(0x07bf, np2sysp_o7bf); | iocore_attachout(0x07ef, np2sysp_o7ef); |
| iocore_attachinp(0x07bf, np2sysp_i7bf); | iocore_attachinp(0x07ef, np2sysp_i7ef); |
| } | } |