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| version 1.17, 2004/03/19 00:30:01 | version 1.19, 2004/03/30 20:01:30 |
|---|---|
| Line 49 void pic_irq(void) { | Line 49 void pic_irq(void) { |
| } | } |
| p = &pic; | p = &pic; |
| // マスター | mir = p->pi[0].irr & (~p->pi[0].imr); |
| imr = p->pi[0].imr; | sir = p->pi[1].irr & (~p->pi[1].imr); |
| mir = p->pi[0].irr; | if ((mir == 0) && (sir == 0)) { |
| mis = p->pi[0].isr; | return; |
| if (!(p->pi[0].ocw3 & PIC_OCW3_SMM)) { | |
| mir &= ~imr; | |
| } | |
| else { | |
| mis &= imr; | |
| } | |
| mir &= ~mis; | |
| slave = p->pi[0].icw[2]; | |
| if (mir) { | |
| dat = mir | mis; | |
| num = p->pi[0].pry; | |
| bit = 1 << num; | |
| while(!(dat & bit)) { | |
| num = (num + 1) & 7; | |
| bit = 1 << num; | |
| } | |
| if ((mir & bit) && (!(slave & bit))) { | |
| p->pi[0].isr |= bit; | |
| p->pi[0].irr &= ~bit; | |
| if (num == 0) { | |
| nevent_reset(NEVENT_PICMASK); | |
| } | |
| // TRACEOUT(("hardware-int %.2x", (p->pi[0].icw[1] & 0xf8) | num)); | |
| CPU_INTERRUPT((REG8)((p->pi[0].icw[1] & 0xf8) | num), 0); | |
| return; | |
| } | |
| } | } |
| // スレーヴ許可? | slave = 1 << (p->pi[1].icw[2] & 7); |
| dat = slave | mis; | dat = mir; |
| if (!dat) { | if (sir) { |
| return; | dat |= slave; |
| } | |
| if (!(p->pi[0].ocw3 & PIC_OCW3_SMM)) { | |
| dat |= p->pi[0].isr; | |
| } | } |
| num = p->pi[0].pry; | num = p->pi[0].pry; |
| bit = 1 << num; | bit = 1 << num; |
| Line 92 void pic_irq(void) { | Line 69 void pic_irq(void) { |
| num = (num + 1) & 7; | num = (num + 1) & 7; |
| bit = 1 << num; | bit = 1 << num; |
| } | } |
| if (!(slave & bit)) { | if (p->pi[0].icw[2] & bit) { // スレーヴ |
| return; | dat = sir; |
| } | if (!(p->pi[1].ocw3 & PIC_OCW3_SMM)) { |
| dat |= p->pi[1].isr; | |
| // スレーヴ | } |
| imr = p->pi[1].imr; | |
| sir = p->pi[1].irr; | |
| sis = p->pi[1].isr; | |
| if (!(p->pi[1].ocw3 & PIC_OCW3_SMM)) { | |
| sir &= ~imr; | |
| } | |
| else { | |
| sis &= imr; | |
| } | |
| sir &= ~sis; | |
| if (sir) { | |
| dat = sir | sis; | |
| num = p->pi[1].pry; | num = p->pi[1].pry; |
| bit = 1 << num; | bit = 1 << num; |
| while(!(dat & bit)) { | while(!(dat & bit)) { |
| num = (num + 1) & 7; | num = (num + 1) & 7; |
| bit = 1 << num; | bit = 1 << num; |
| } | } |
| if (sir & bit) { | if (!(p->pi[1].isr & bit)) { |
| p->pi[0].isr |= slave; | |
| p->pi[0].irr &= ~slave; | |
| p->pi[1].isr |= bit; | p->pi[1].isr |= bit; |
| p->pi[1].irr &= ~bit; | p->pi[1].irr &= ~bit; |
| master = 1 << (p->pi[1].icw[2] & 7); | |
| if (!(p->pi[0].isr & master)) { | |
| p->pi[0].isr |= master; | |
| p->pi[0].irr &= ~master; | |
| } | |
| // TRACEOUT(("hardware-int %.2x", (p->pi[1].icw[1] & 0xf8) | num)); | // TRACEOUT(("hardware-int %.2x", (p->pi[1].icw[1] & 0xf8) | num)); |
| CPU_INTERRUPT((REG8)((p->pi[1].icw[1] & 0xf8) | num), 0); | CPU_INTERRUPT((REG8)((p->pi[1].icw[1] & 0xf8) | num), 0); |
| return; | |
| } | } |
| } | } |
| else if (!(p->pi[0].isr & bit)) { // マスター | |
| p->pi[0].isr |= bit; | |
| p->pi[0].irr &= ~bit; | |
| if (num == 0) { | |
| nevent_reset(NEVENT_PICMASK); | |
| } | |
| // TRACEOUT(("hardware-int %.2x", (p->pi[0].icw[1] & 0xf8) | num)); | |
| CPU_INTERRUPT((REG8)((p->pi[0].icw[1] & 0xf8) | num), 0); | |
| } | |
| } | } |
| Line 301 static REG8 IOINPCALL pic_i02(UINT port) | Line 271 static REG8 IOINPCALL pic_i02(UINT port) |
| // ---- I/F | // ---- I/F |
| #if !defined(SUPPORT_PC9821) | |
| static const IOOUT pico00[2] = { | static const IOOUT pico00[2] = { |
| pic_o00, pic_o02}; | pic_o00, pic_o02}; |
| static const IOINP pici00[2] = { | static const IOINP pici00[2] = { |
| pic_i00, pic_i02}; | pic_i00, pic_i02}; |
| #else | |
| static const IOOUT pico00[4] = { | |
| pic_o00, pic_o02, NULL, NULL}; | |
| static const IOINP pici00[4] = { | |
| pic_i00, pic_i02, NULL, NULL}; | |
| #endif | |
| void pic_reset(void) { | void pic_reset(void) { |
| Line 315 void pic_reset(void) { | Line 293 void pic_reset(void) { |
| void pic_bind(void) { | void pic_bind(void) { |
| #if !defined(SUPPORT_PC9821) | |
| iocore_attachsysoutex(0x0000, 0x0cf1, pico00, 2); | iocore_attachsysoutex(0x0000, 0x0cf1, pico00, 2); |
| iocore_attachsysinpex(0x0000, 0x0cf1, pici00, 2); | iocore_attachsysinpex(0x0000, 0x0cf1, pici00, 2); |
| #else | |
| iocore_attachsysoutex(0x0000, 0x0cf1, pico00, 4); | |
| iocore_attachsysinpex(0x0000, 0x0cf1, pici00, 4); | |
| #endif | |
| } | } |