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| version 1.98, 2005/02/27 15:07:35 | version 1.107, 2007/11/03 00:00:18 |
|---|---|
| Line 104 const OEMCHAR *p; | Line 104 const OEMCHAR *p; |
| // ---- | // ---- |
| static void pccore_set(void) { | static void pccore_set(const NP2CFG *pConfig) |
| { | |
| UINT8 model; | UINT8 model; |
| UINT32 multiple; | UINT32 multiple; |
| UINT8 extsize; | UINT8 extsize; |
| ZeroMemory(&pccore, sizeof(pccore)); | ZeroMemory(&pccore, sizeof(pccore)); |
| model = PCMODEL_VX; | model = PCMODEL_VX; |
| if (!milstr_cmp(np2cfg.model, str_VM)) { | if (!milstr_cmp(pConfig->model, str_VM)) { |
| model = PCMODEL_VM; | model = PCMODEL_VM; |
| } | } |
| else if (!milstr_cmp(np2cfg.model, str_EPSON)) { | else if (!milstr_cmp(pConfig->model, str_EPSON)) { |
| model = PCMODEL_EPSON | PCMODEL_VM; | model = PCMODEL_EPSON | PCMODEL_VM; |
| } | } |
| pccore.model = model; | pccore.model = model; |
| if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) |
| { | |
| pccore.baseclock = PCBASECLOCK25; // 2.5MHz | pccore.baseclock = PCBASECLOCK25; // 2.5MHz |
| pccore.cpumode = 0; | pccore.cpumode = 0; |
| } | } |
| else { | else |
| { | |
| pccore.baseclock = PCBASECLOCK20; // 2.0MHz | pccore.baseclock = PCBASECLOCK20; // 2.0MHz |
| pccore.cpumode = CPUMODE_8MHZ; | pccore.cpumode = CPUMODE_8MHZ; |
| } | } |
| multiple = np2cfg.multiple; | multiple = pConfig->multiple; |
| if (multiple == 0) { | if (multiple == 0) |
| { | |
| multiple = 1; | multiple = 1; |
| } | } |
| else if (multiple > 32) { | else if (multiple > 32) |
| { | |
| multiple = 32; | multiple = 32; |
| } | } |
| pccore.multiple = multiple; | pccore.multiple = multiple; |
| pccore.realclock = pccore.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; |
| // HDDの接続 (I/Oの使用状態が変わるので.. | // HDDの接続 (I/Oの使用状態が変わるので.. |
| if (np2cfg.dipsw[1] & 0x20) { | if (pConfig->dipsw[1] & 0x20) |
| { | |
| pccore.hddif |= PCHDD_IDE; | pccore.hddif |= PCHDD_IDE; |
| #if defined(SUPPORT_IDEIO) | |
| sxsi_setdevtype(0x02, SXSIDEV_CDROM); | |
| #endif | |
| } | |
| else | |
| { | |
| sxsi_setdevtype(0x02, SXSIDEV_NC); | |
| } | } |
| // 拡張メモリ | // 拡張メモリ |
| extsize = 0; | extsize = 0; |
| if (!(np2cfg.dipsw[2] & 0x80)) { | if (!(pConfig->dipsw[2] & 0x80)) |
| extsize = min(np2cfg.EXTMEM, 13); | { |
| extsize = np2cfg.EXTMEM; | |
| #if defined(CPUCORE_IA32) | |
| extsize = min(extsize, 63); | |
| #else | |
| extsize = min(extsize, 13); | |
| #endif | |
| } | } |
| pccore.extmem = extsize; | pccore.extmem = extsize; |
| CopyMemory(pccore.dipsw, np2cfg.dipsw, 3); | CopyMemory(pccore.dipsw, pConfig->dipsw, 3); |
| // サウンドボードの接続 | // サウンドボードの接続 |
| pccore.sound = np2cfg.SOUND_SW; | pccore.sound = pConfig->SOUND_SW; |
| // その他CBUSの接続 | // その他CBUSの接続 |
| pccore.device = 0; | pccore.device = 0; |
| if (np2cfg.pc9861enable) { | if (pConfig->pc9861enable) |
| { | |
| pccore.device |= PCCBUS_PC9861K; | pccore.device |= PCCBUS_PC9861K; |
| } | } |
| if (np2cfg.mpuenable) { | if (pConfig->mpuenable) |
| { | |
| pccore.device |= PCCBUS_MPU98; | pccore.device |= PCCBUS_MPU98; |
| } | } |
| } | } |
| Line 168 static void pccore_set(void) { | Line 188 static void pccore_set(void) { |
| // -------------------------------------------------------------------------- | // -------------------------------------------------------------------------- |
| #if !defined(DISABLE_SOUND) | #if !defined(DISABLE_SOUND) |
| static void sound_init(void) { | static void sound_init() |
| { | |
| UINT rate; | UINT rate; |
| rate = np2cfg.samplingrate; | rate = np2cfg.samplingrate; |
| if ((rate != 11025) && (rate != 22050) && (rate != 44100)) { | if ((rate != 11025) && (rate != 22050) && (rate != 44100)) |
| { | |
| rate = 0; | rate = 0; |
| } | } |
| sound_create(rate, np2cfg.delayms); | sound_create(rate, np2cfg.delayms); |
| Line 225 void pccore_init(void) { | Line 246 void pccore_init(void) { |
| fddfile_initialize(); | fddfile_initialize(); |
| #if !defined(DISABLE_SOUND) | #if !defined(DISABLE_SOUND) |
| sound_init(); | sound_init(&np2cfg); |
| #endif | #endif |
| rs232c_construct(); | rs232c_construct(); |
| Line 260 void pccore_term(void) { | Line 281 void pccore_term(void) { |
| mpu98ii_destruct(); | mpu98ii_destruct(); |
| rs232c_destruct(); | rs232c_destruct(); |
| sxsi_trash(); | sxsi_alltrash(); |
| CPU_DEINITIALIZE(); | CPU_DEINITIALIZE(); |
| } | } |
| Line 292 void pccore_reset(void) { | Line 313 void pccore_reset(void) { |
| if (soundrenewal) { | if (soundrenewal) { |
| soundrenewal = 0; | soundrenewal = 0; |
| sound_term(); | sound_term(); |
| sound_init(); | sound_init(&np2cfg); |
| } | } |
| #endif | #endif |
| ZeroMemory(mem, 0x110000); | ZeroMemory(mem, 0x110000); |
| Line 301 void pccore_reset(void) { | Line 322 void pccore_reset(void) { |
| ZeroMemory(mem + FONT_ADRS, 0x08000); | ZeroMemory(mem + FONT_ADRS, 0x08000); |
| //メモリスイッチ | //メモリスイッチ |
| for (i=0; i<8; i++) { | for (i=0; i<8; i++) |
| { | |
| mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; |
| } | } |
| pccore_set(); | pccore_set(&np2cfg); |
| nevent_allreset(); | nevent_allreset(); |
| CPU_RESET(); | CPU_RESET(); |
| Line 320 void pccore_reset(void) { | Line 342 void pccore_reset(void) { |
| } | } |
| // HDDセット | // HDDセット |
| sxsi_open(); | diskdrv_hddbind(); |
| // SASI/IDEどっち? | |
| #if defined(SUPPORT_SASI) | #if defined(SUPPORT_SASI) |
| if (sxsi_issasi()) { | if (sxsi_issasi()) { |
| pccore.hddif &= ~PCHDD_IDE; | pccore.hddif &= ~PCHDD_IDE; |
| Line 343 void pccore_reset(void) { | Line 366 void pccore_reset(void) { |
| fddfile_reset2dmode(); | fddfile_reset2dmode(); |
| bios0x18_16(0x20, 0xe1); | bios0x18_16(0x20, 0xe1); |
| iocore_reset(); // サウンドでpicを呼ぶので… | iocore_reset(&np2cfg); // サウンドでpicを呼ぶので… |
| cbuscore_reset(); | cbuscore_reset(&np2cfg); |
| fmboard_reset(pccore.sound); | fmboard_reset(&np2cfg, pccore.sound); |
| i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | MEMM_ARCH((pccore.model & PCMODEL_EPSON)?1:0); |
| iocore_build(); | iocore_build(); |
| iocore_bind(); | iocore_bind(); |
| cbuscore_bind(); | cbuscore_bind(); |
| Line 374 void pccore_reset(void) { | Line 397 void pccore_reset(void) { |
| timing_reset(); | timing_reset(); |
| soundmng_play(); | soundmng_play(); |
| #if 0 && defined(SUPPORT_IDEIO) // Test! | |
| sxsi_devopen(0x02, OEMTEXT("e:\\pn\\pn.iso")); | |
| #endif | |
| } | } |
| static void drawscreen(void) { | static void drawscreen(void) { |
| Line 548 void screenvsync(NEVENTITEM item) { | Line 575 void screenvsync(NEVENTITEM item) { |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| // #define SINGLESTEPONLY | // #define SINGLESTEPONLY |
| // #define IPTRACE (1 << 12) | |
| #if defined(TRACE) && IPTRACE | |
| static UINT trpos = 0; | |
| static UINT32 treip[IPTRACE]; | |
| void iptrace_out(void) { | |
| FILEH fh; | |
| UINT s; | |
| UINT32 eip; | |
| char buf[32]; | |
| s = trpos; | |
| if (s > IPTRACE) { | |
| s -= IPTRACE; | |
| } | |
| else { | |
| s = 0; | |
| } | |
| fh = file_create_c("his.txt"); | |
| while(s < trpos) { | |
| eip = treip[s & (IPTRACE - 1)]; | |
| s++; | |
| SPRINTF(buf, "%.4x:%.4x\r\n", (eip >> 16), eip & 0xffff); | |
| file_write(fh, buf, strlen(buf)); | |
| } | |
| file_close(fh); | |
| } | |
| #endif | |
| #if defined(TRACE) | #if defined(TRACE) |
| static int resetcnt = 0; | static int resetcnt = 0; |
| static int execcnt = 0; | static int execcnt = 0; |
| int piccnt = 0; | int piccnt = 0; |
| int tr = 0; | |
| UINT cflg; | |
| #endif | #endif |
| Line 621 void pccore_exec(BOOL draw) { | Line 615 void pccore_exec(BOOL draw) { |
| CPU_RESETREQ = 0; | CPU_RESETREQ = 0; |
| CPU_SHUT(); | CPU_SHUT(); |
| } | } |
| #if !defined(SINGLESTEPONLY) | #if !defined(SINGLESTEPONLY) |
| if (CPU_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { |
| if (!(CPU_TYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { |
| Line 633 void pccore_exec(BOOL draw) { | Line 626 void pccore_exec(BOOL draw) { |
| } | } |
| #else | #else |
| while(CPU_REMCLOCK > 0) { | while(CPU_REMCLOCK > 0) { |
| #if 0 | |
| if (CPU_CS == 0x05a0) { | |
| if (CPU_IP == 0xe2) { | |
| TRACEOUT(("result: %.2x", CPU_AH)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if (CPU_CS == 0x0000) { | |
| if (CPU_IP == 0x1191) { | |
| char buf[10]; | |
| int i; | |
| for (i=0; i<6; i++) { | |
| buf[i] = MEML_READ8(0x1000, CPU_BX + i); | |
| } | |
| buf[6] = '\0'; | |
| TRACEOUT(("load: %s", buf)); | |
| } | |
| if (CPU_IP == 0x1265) { | |
| TRACEOUT(("%.4x:%.4x addr=%.4x ret=%.4x", | |
| CPU_CS, CPU_IP, CPU_DX, | |
| MEML_READ16(CPU_SS, CPU_SP))); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if (CPU_CS == 0x0080) { | |
| if (CPU_IP == 0x052A) { | |
| UINT i; | |
| UINT addr; | |
| char fname[9]; | |
| addr = MEML_READ16(CPU_SS, CPU_BP + 4); | |
| for (i=0; i<8; i++) { | |
| fname[i] = MEML_READ8(CPU_DS, addr + i); | |
| } | |
| fname[8] = 0; | |
| TRACEOUT(("%.4x:%.4x play... addr:%.4x %s", | |
| CPU_CS, CPU_IP, addr, fname)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if (CPU_CS == 0x800) { | |
| if (CPU_IP == 0x017A) { | |
| TRACEOUT(("%.4x:%.4x solve... DS=%.4x SIZE=%.4x KEY=%.4x", | |
| CPU_CS, CPU_IP, | |
| MEML_READ16(CPU_SS, CPU_BP - 0x06), | |
| CPU_DX, | |
| MEML_READ16(CPU_SS, CPU_BP - 0x08))); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if (CPU_CS == 0x3d52) { | |
| if (CPU_IP == 0x4A57) { | |
| TRACEOUT(("%.4x:%.4x %.4x:%.4x/%.4x/%.4x", | |
| CPU_DX, CPU_BX, CPU_DS, | |
| MEML_READ16(CPU_SS, CPU_BP + 0x06), | |
| MEML_READ16(CPU_SS, CPU_BP + 0x08), | |
| MEML_READ16(CPU_SS, CPU_BP + 0x0a))); | |
| } | |
| if (CPU_IP == 0x4BF8) { | |
| debugsub_memorydump(); | |
| } | |
| #if 0 | |
| if (CPU_IP == 0x4B7A) { | |
| TRACEOUT(("datum = %x", CPU_AX)); | |
| } | |
| if (CPU_IP == 0x4B87) { | |
| TRACEOUT(("leng = %x", CPU_AX)); | |
| } | |
| if (CPU_IP == 0x4BD5) { | |
| TRACEOUT(("%.4x:%.4x <- %.2x[%.4x]", | |
| CPU_ES, CPU_BX, CPU_AL, CPU_DI)); | |
| } | |
| #endif | |
| } | |
| #endif | |
| #if 0 // DC | |
| if (CPU_CS == 0x1000) { | |
| if (CPU_IP == 0x5924) { | |
| TRACEOUT(("%.4x:%.4x -> %.4x:%.4x", CPU_CS, CPU_IP, | |
| MEML_READ16(CPU_DS, 0x6846), | |
| MEML_READ16(CPU_DS, 0x6848))); | |
| } | |
| } | |
| #endif | |
| #if 0 // 羅針盤 | |
| if (CPU_CS == 0x60) { | |
| if (CPU_IP == 0xADF9) { | |
| TRACEOUT(("%.4x:%.4x -> %.4x:%.4x:%.4x", CPU_CS, CPU_IP, CPU_BX, CPU_SI, CPU_AX)); | |
| } | |
| else if (CPU_IP == 0xC7E1) { | |
| TRACEOUT(("%.4x:%.4x -> %.4x:%.4x", CPU_CS, CPU_IP, CPU_ES, CPU_BX)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if (CPU_CS == 0x60) { | |
| if (CPU_IP == 0x8AC2) { | |
| UINT pos = CPU_SI + (CPU_AX * 6); | |
| TRACEOUT(("%.4x:%.4x -> %.4x:%.4x-%.4x:%.4x [%.2x %.2x %.2x %.2x %.2x %.2x]", CPU_CS, CPU_IP, CPU_SI, CPU_AX, CPU_DX, CPU_DI, | |
| MEML_READ8(CPU_DS, pos+0), | |
| MEML_READ8(CPU_DS, pos+1), | |
| MEML_READ8(CPU_DS, pos+2), | |
| MEML_READ8(CPU_DS, pos+3), | |
| MEML_READ8(CPU_DS, pos+4), | |
| MEML_READ8(CPU_DS, pos+5))); | |
| } | |
| } | |
| #endif | |
| #if IPTRACE | |
| treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | |
| trpos++; | |
| #endif | |
| // TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | |
| CPU_STEPEXEC(); | CPU_STEPEXEC(); |
| } | } |
| #endif | #endif |