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| version 1.32, 2003/12/15 11:26:04 | version 1.59, 2004/01/30 01:29:13 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "strres.h" | |
| #include "dosio.h" | #include "dosio.h" |
| #include "soundmng.h" | #include "soundmng.h" |
| #include "sysmng.h" | #include "sysmng.h" |
| #include "timemng.h" | #include "timemng.h" |
| #include "cpucore.h" | #include "cpucore.h" |
| #include "np2ver.h" | |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "cbuscore.h" | #include "cbuscore.h" |
| Line 28 | Line 28 |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_mtr.h" | #include "fdd_mtr.h" |
| #include "sxsi.h" | #include "sxsi.h" |
| #if defined(SUPPORT_HOSTDRV) | |
| #include "hostdrv.h" | |
| #endif | |
| #include "np2ver.h" | |
| #include "calendar.h" | #include "calendar.h" |
| #include "timing.h" | #include "timing.h" |
| //#include "hostdrv.h" | |
| #include "debugsub.h" | #include "debugsub.h" |
| Line 50 | Line 53 |
| 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, |
| 1, 0x82, | 1, 0x82, |
| 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, |
| 1, 80, 0, | 3, 1, 80, 0, 0, |
| {"", ""}, "", ""}; | {"", ""}, {"", "", "", ""}, "", "", ""}; |
| PCCORE pc = { PCBASECLOCK25, | PCCORE pccore = { PCBASECLOCK25, 4, |
| 4, | 0, PCMODEL_VX, 0, 0, |
| 4 * PCBASECLOCK25, | 0, 0, |
| 4 * PCBASECLOCK25 * 50 / 3104, | 4 * PCBASECLOCK25, |
| 4 * PCBASECLOCK25 * 5 / 3104, | 4 * PCBASECLOCK25 * 50 / 3104, |
| 4 * PCBASECLOCK25 / 120, | 4 * PCBASECLOCK25 * 5 / 3104, |
| 4 * PCBASECLOCK25 / 1920, | 4 * PCBASECLOCK25 / 1920, |
| 4 * PCBASECLOCK25 / 3125, | 4 * PCBASECLOCK25 / 3125, |
| 4 * PCBASECLOCK25 / 56400, | 100, 20}; |
| 100, 20, 0, PCMODEL_VX}; | |
| // on=0, off=1 | // on=0, off=1 |
| // BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; | // BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; |
| Line 74 static const BYTE msw_default[8] = | Line 76 static const BYTE msw_default[8] = |
| int soundrenewal = 0; | int soundrenewal = 0; |
| BOOL drawframe; | BOOL drawframe; |
| UINT drawcount = 0; | UINT drawcount = 0; |
| BOOL hardwarereset = FALSE; | |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| Line 83 void getbiospath(char *path, const char | Line 86 void getbiospath(char *path, const char |
| const char *p; | const char *p; |
| p = np2cfg.biospath; | p = np2cfg.biospath; |
| p = np2cfg.biospath; | |
| if (p[0]) { | if (p[0]) { |
| file_cpyname(path, p, maxlen); | file_cpyname(path, p, maxlen); |
| file_setseparator(path, maxlen); | file_setseparator(path, maxlen); |
| Line 128 static void setvsyncclock(void) { | Line 129 static void setvsyncclock(void) { |
| vs = 1; | vs = 1; |
| } | } |
| maxy = disp + vs; | maxy = disp + vs; |
| cnt = (pc.realclock * 5) / 282; | cnt = (pccore.realclock * 5) / 282; |
| pc.raster = cnt / maxy; | pccore.raster = cnt / maxy; |
| pc.hsync = (pc.raster * 4) / 5; | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.raster * disp; | pccore.dispclock = pccore.raster * disp; |
| pc.vsyncclock = cnt - pc.dispclock; | pccore.vsyncclock = cnt - pccore.dispclock; |
| } | } |
| static void setpcclock(UINT base, UINT multiple) { | static void pccore_set(void) { |
| pc.model = PCMODEL_VX; | UINT8 model; |
| UINT32 multiple; | |
| UINT8 extsize; | |
| if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | ZeroMemory(&pccore, sizeof(pccore)); |
| pc.baseclock = PCBASECLOCK25; // 2.5MHz | model = PCMODEL_VX; |
| pc.cpumode = 0; | if (!milstr_cmp(np2cfg.model, str_VM)) { |
| model = PCMODEL_VM; | |
| } | |
| else if (!milstr_cmp(np2cfg.model, str_EPSON)) { | |
| model = PCMODEL_EPSON | PCMODEL_VM; | |
| } | |
| pccore.model = model; | |
| if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | |
| pccore.baseclock = PCBASECLOCK25; // 2.5MHz | |
| pccore.cpumode = 0; | |
| } | } |
| else { | else { |
| pc.baseclock = PCBASECLOCK20; // 2.0MHz | pccore.baseclock = PCBASECLOCK20; // 2.0MHz |
| pc.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHz; |
| } | } |
| multiple = np2cfg.multiple; | |
| if (multiple == 0) { | if (multiple == 0) { |
| multiple = 1; | multiple = 1; |
| } | } |
| else if (multiple > 32) { | else if (multiple > 32) { |
| multiple = 32; | multiple = 32; |
| } | } |
| pc.multiple = multiple; | pccore.multiple = multiple; |
| pc.realclock = pc.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; |
| pc.raster = pc.realclock / 24816; // ver0.28 | pccore.raster = pccore.realclock / 24816; |
| pc.hsync = (pc.raster * 4) / 5; // ver0.28 | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.realclock * 50 / 3102; | pccore.dispclock = pccore.realclock * 50 / 3102; |
| pc.vsyncclock = pc.realclock * 5 / 3102; | pccore.vsyncclock = pccore.realclock * 5 / 3102; |
| pc.mouseclock = pc.realclock / 120; | pccore.keyboardclock = pccore.realclock / 1920; |
| pc.keyboardclock = pc.realclock / 1920; | pccore.midiclock = pccore.realclock / 3125; |
| pc.midiclock = pc.realclock / 3125; | |
| pc.frame1000 = pc.realclock / 56400; | // HDDの接続 (I/Oの使用状態が変わるので.. |
| if (np2cfg.dipsw[1] & 0x20) { | |
| pccore.hddif |= PCHDD_IDE; | |
| } | |
| // 拡張メモリ | |
| extsize = 0; | |
| if (!(np2cfg.dipsw[2] & 0x80)) { | |
| extsize = min(np2cfg.EXTMEM, 13); | |
| } | |
| pccore.extmem = extsize; | |
| // サウンドボードの接続 | |
| pccore.sound = np2cfg.SOUND_SW; | |
| // その他CBUSの接続 | |
| pccore.device = 0; | |
| if (np2cfg.pc9861enable) { | |
| pccore.device |= PCCBUS_PC9861K; | |
| } | |
| if (np2cfg.mpuenable) { | |
| pccore.device |= PCCBUS_MPU98; | |
| } | |
| } | } |
| Line 177 static void sound_init(void) { | Line 213 static void sound_init(void) { |
| rate = 0; | rate = 0; |
| } | } |
| sound_create(rate, np2cfg.delayms); | sound_create(rate, np2cfg.delayms); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_initialize(rate); | |
| #endif | |
| beep_initialize(rate); | beep_initialize(rate); |
| beep_setvol(np2cfg.BEEP_VOL); | beep_setvol(np2cfg.BEEP_VOL); |
| tms3631_initialize(rate); | tms3631_initialize(rate); |
| Line 191 static void sound_init(void) { | Line 230 static void sound_init(void) { |
| adpcm_setvol(np2cfg.vol_adpcm); | adpcm_setvol(np2cfg.vol_adpcm); |
| pcm86gen_initialize(rate); | pcm86gen_initialize(rate); |
| pcm86gen_setvol(np2cfg.vol_pcm); | pcm86gen_setvol(np2cfg.vol_pcm); |
| cs4231_initialize(rate); | |
| } | } |
| static void sound_term(void) { | static void sound_term(void) { |
| soundmng_stop(); | soundmng_stop(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_deinitialize(); | |
| #endif | |
| rhythm_deinitialize(); | rhythm_deinitialize(); |
| sound_destroy(); | sound_destroy(); |
| } | } |
| Line 224 void pccore_init(void) { | Line 267 void pccore_init(void) { |
| pc9861k_construct(); | pc9861k_construct(); |
| iocore_create(); | iocore_create(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_initialize(); | |
| #endif | |
| } | } |
| void pccore_term(void) { | void pccore_term(void) { |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_deinitialize(); | |
| #endif | |
| sound_term(); | sound_term(); |
| fdd_eject(0); | fdd_eject(0); |
| Line 235 void pccore_term(void) { | Line 286 void pccore_term(void) { |
| fdd_eject(2); | fdd_eject(2); |
| fdd_eject(3); | fdd_eject(3); |
| extmemmng_clear(); | |
| iocore_destroy(); | iocore_destroy(); |
| pc9861k_destruct(); | pc9861k_destruct(); |
| Line 244 void pccore_term(void) { | Line 293 void pccore_term(void) { |
| mpu98ii_destruct(); | mpu98ii_destruct(); |
| sxsi_trash(); | sxsi_trash(); |
| CPU_DEINITIALIZE(); | |
| } | } |
| Line 268 void pccore_reset(void) { | Line 319 void pccore_reset(void) { |
| int i; | int i; |
| // reset_hostdrv(); | soundmng_stop(); |
| if (soundrenewal) { | |
| soundrenewal = 0; | |
| sound_term(); | |
| sound_init(); | |
| } | |
| ZeroMemory(mem, 0x10fff0); // ver0.28 | ZeroMemory(mem, 0x110000); // ver0.28 |
| ZeroMemory(mem + VRAM1_B, 0x18000); | ZeroMemory(mem + VRAM1_B, 0x18000); |
| ZeroMemory(mem + VRAM1_E, 0x08000); | ZeroMemory(mem + VRAM1_E, 0x08000); |
| ZeroMemory(mem + FONT_ADRS, 0x08000); | ZeroMemory(mem + FONT_ADRS, 0x08000); |
| //メモリスイッチ | |
| for (i=0; i<8; i++) { | |
| mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | |
| } | |
| pccore_set(); | |
| nevent_init(); | |
| CPU_RESET(); | CPU_RESET(); |
| CPU_SETEXTSIZE((UINT32)pccore.extmem); | |
| CPU_TYPE = 0; | CPU_TYPE = 0; |
| if (np2cfg.dipsw[2] & 0x80) { | if (np2cfg.dipsw[2] & 0x80) { |
| CPU_TYPE = CPUTYPE_V30; | CPU_TYPE = CPUTYPE_V30; |
| } | } |
| if (pccore.model & PCMODEL_EPSON) { // RAM ctrl | |
| //メモリスイッチ | CPU_RAM_D000 = 0xffff; |
| for (i=0; i<8; i++) { | |
| mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | |
| } | } |
| fddfile_reset2dmode(); | // HDDセット |
| bios0x18_16(0x20, 0xe1); | sxsi_open(); |
| #if defined(SUPPORT_SASI) | |
| soundmng_stop(); | if (sxsi_issasi()) { |
| if (soundrenewal) { | pccore.hddif &= ~PCHDD_IDE; |
| soundrenewal = 0; | pccore.hddif |= PCHDD_SASI; |
| sound_term(); | TRACEOUT(("supported SASI")); |
| sound_init(); | |
| } | } |
| #endif | |
| #if defined(SUPPORT_SCSI) | |
| if (sxsi_isscsi()) { | |
| pccore.hddif |= PCHDD_SCSI; | |
| TRACEOUT(("supported SCSI")); | |
| } | |
| #endif | |
| setpcclock(np2cfg.baseclock, np2cfg.multiple); | |
| sound_changeclock(); | sound_changeclock(); |
| beep_changeclock(); | beep_changeclock(); |
| nevent_init(); | |
| sound_reset(); | sound_reset(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_bind(); | |
| #endif | |
| fddfile_reset2dmode(); | |
| bios0x18_16(0x20, 0xe1); | |
| iocore_reset(); // サウンドでpicを呼ぶので… | iocore_reset(); // サウンドでpicを呼ぶので… |
| cbuscore_reset(); | cbuscore_reset(); |
| fmboard_reset(np2cfg.SOUND_SW); | fmboard_reset(pccore.sound); |
| i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | |
| iocore_build(); | iocore_build(); |
| iocore_bind(); | iocore_bind(); |
| cbuscore_bind(); | cbuscore_bind(); |
| fmboard_bind(); | fmboard_bind(); |
| timing_reset(); | |
| fddmtr_init(); | fddmtr_init(); |
| calendar_init(); | calendar_init(); |
| vram_init(); | vram_init(); |
| Line 320 void pccore_reset(void) { | Line 393 void pccore_reset(void) { |
| pal_change(1); | pal_change(1); |
| bios_init(); | bios_init(); |
| sxsi_open(); | |
| if (np2cfg.ITF_WORK) { | if (np2cfg.ITF_WORK) { |
| CS_BASE = 0xf0000; | CS_BASE = 0xf0000; |
| Line 338 void pccore_reset(void) { | Line 410 void pccore_reset(void) { |
| CPU_CLEARPREFETCH(); | CPU_CLEARPREFETCH(); |
| sysmng_cpureset(); | sysmng_cpureset(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_reset(); | |
| #endif | |
| timing_reset(); | |
| soundmng_play(); | soundmng_play(); |
| } | } |
| Line 490 void screendisp(NEVENTITEM item) { | Line 567 void screendisp(NEVENTITEM item) { |
| void screenvsync(NEVENTITEM item) { | void screenvsync(NEVENTITEM item) { |
| vramop.tramwait = np2cfg.wait[1]; | MEMWAIT_TRAM = np2cfg.wait[1]; |
| vramop.vramwait = np2cfg.wait[3]; | MEMWAIT_VRAM = np2cfg.wait[3]; |
| vramop.grcgwait = np2cfg.wait[5]; | MEMWAIT_GRCG = np2cfg.wait[5]; |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| gdc.vsync = 0x20; | gdc.vsync = 0x20; |
| if (gdc.vsyncint) { | if (gdc.vsyncint) { |
| gdc.vsyncint = 0; | gdc.vsyncint = 0; |
| pic_setirq(2); | pic_setirq(2); |
| } | } |
| nevent_set(NEVENT_FLAMES, pc.vsyncclock, screendisp, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.vsyncclock, screendisp, NEVENT_RELATIVE); |
| // drawscreenで pc.vsyncclockが変更される可能性があります // ver0.28 | // drawscreenで pccore.vsyncclockが変更される可能性があります |
| if (np2cfg.DISPSYNC) { // ver0.29 | if (np2cfg.DISPSYNC) { // ver0.29 |
| drawscreen(); | drawscreen(); |
| } | } |
| Line 511 void screenvsync(NEVENTITEM item) { | Line 588 void screenvsync(NEVENTITEM item) { |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| // #define IPTRACE (1 << 12) | |
| #if defined(TRACE) && IPTRACE | |
| static UINT trpos = 0; | |
| static UINT32 treip[IPTRACE]; | |
| void iptrace_out(void) { | |
| FILEH fh; | |
| UINT s; | |
| UINT32 eip; | |
| char buf[32]; | |
| s = trpos; | |
| if (s > IPTRACE) { | |
| s -= IPTRACE; | |
| } | |
| else { | |
| s = 0; | |
| } | |
| fh = file_create_c("his.txt"); | |
| while(s < trpos) { | |
| eip = treip[s & (IPTRACE - 1)]; | |
| s++; | |
| SPRINTF(buf, "%.4x:%.4x\r\n", (eip >> 16), eip & 0xffff); | |
| file_write(fh, buf, strlen(buf)); | |
| } | |
| file_close(fh); | |
| } | |
| #endif | |
| #if defined(TRACE) | #if defined(TRACE) |
| static int resetcnt = 0; | static int resetcnt = 0; |
| static int execcnt = 0; | static int execcnt = 0; |
| int piccnt = 0; | int piccnt = 0; |
| int tr = 0; | |
| UINT cflg; | |
| #endif | #endif |
| void pccore_exec(BOOL draw) { | void pccore_exec(BOOL draw) { |
| drawframe = draw; | drawframe = draw; |
| Line 527 void pccore_exec(BOOL draw) { | Line 639 void pccore_exec(BOOL draw) { |
| gdc.vsync = 0; | gdc.vsync = 0; |
| screendispflag = 1; | screendispflag = 1; |
| vramop.tramwait = np2cfg.wait[0]; | MEMWAIT_TRAM = np2cfg.wait[0]; |
| vramop.vramwait = np2cfg.wait[2]; | MEMWAIT_VRAM = np2cfg.wait[2]; |
| vramop.grcgwait = np2cfg.wait[4]; | MEMWAIT_GRCG = np2cfg.wait[4]; |
| nevent_set(NEVENT_FLAMES, pc.dispclock, screenvsync, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.dispclock, screenvsync, NEVENT_RELATIVE); |
| // nevent_get1stevent(); | // nevent_get1stevent(); |
| Line 541 void pccore_exec(BOOL draw) { | Line 653 void pccore_exec(BOOL draw) { |
| pic_irq(); | pic_irq(); |
| if (CPU_RESETREQ) { | if (CPU_RESETREQ) { |
| CPU_RESETREQ = 0; | CPU_RESETREQ = 0; |
| #if 1 | |
| CPU_SHUT(); | |
| #else | |
| CPU_CS = 0xf000; | CPU_CS = 0xf000; |
| CS_BASE = 0xf0000; | CS_BASE = 0xf0000; |
| CPU_IP = 0xfff0; | CPU_IP = 0xfff0; |
| Line 548 void pccore_exec(BOOL draw) { | Line 663 void pccore_exec(BOOL draw) { |
| CPU_DX = 0x0300; | CPU_DX = 0x0300; |
| #endif | #endif |
| CPU_CLEARPREFETCH(); | CPU_CLEARPREFETCH(); |
| #endif | |
| } | } |
| #if 1 //ndef TRACE | #if 1 // ndef TRACE |
| if (CPU_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { |
| if (!(CPU_TYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { |
| CPU_EXEC(); | CPU_EXEC(); |
| Line 561 void pccore_exec(BOOL draw) { | Line 677 void pccore_exec(BOOL draw) { |
| } | } |
| #else | #else |
| while(CPU_REMCLOCK > 0) { | while(CPU_REMCLOCK > 0) { |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | #if IPTRACE |
| i286_step(); | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; |
| trpos++; | |
| #endif | |
| #if 1 | |
| if ((CPU_CS == 0xf800) && (CPU_IP == 0x0B5B)) { | |
| TRACEOUT(("%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | |
| mem[0x9000], mem[0x9001], | |
| mem[0x9002], mem[0x9003], | |
| mem[0x9004], mem[0x9005], | |
| mem[0x9006], mem[0x9007], | |
| mem[0x9008], mem[0x9009])); | |
| } | |
| if ((CPU_CS == 0xf800) && (CPU_IP == 0x15FF)) { | |
| TRACEOUT(("DX = %.4x / DS:DI = %.4x:%.4x [%.2x]", | |
| CPU_DX, CPU_DS, CPU_DI, mem[0xa3fe0])); | |
| } | |
| #endif | |
| #if 0 | |
| if ((tr & 2) && (mem[0x0471e] == '\\')) { | |
| TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); | |
| TRACEOUT(("0471:000e %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | |
| mem[0x0471e+0], mem[0x0471e+1], mem[0x0471e+2], mem[0x0471e+3], | |
| mem[0x0471e+4], mem[0x0471e+5], mem[0x0471e+6], mem[0x0471e+7])); | |
| tr -= 2; | |
| } | |
| // DOS6 | |
| if (CPU_CS == 0xffd0) { | |
| if (CPU_IP == 0xc4c2) { | |
| TRACEOUT(("DS:DX = %.4x:%.4x / CX = %.4x", CPU_DS, CPU_DX, CPU_CX)); | |
| } | |
| else if (CPU_IP == 0xc21d) { | |
| TRACEOUT(("-> DS:BX = %.4x:%.4x", CPU_DS, CPU_BX)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if ((CPU_CS == 0x0620) || (CPU_CS == 0x08a0)) { | |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | |
| } | |
| #endif | |
| i286x_step(); | |
| // i286c_step(); | |
| } | } |
| #endif | #endif |
| nevent_progress(); | nevent_progress(); |
| Line 574 void pccore_exec(BOOL draw) { | Line 731 void pccore_exec(BOOL draw) { |
| S98_sync(); | S98_sync(); |
| sound_sync(); // happy! | sound_sync(); // happy! |
| if (hardwarereset) { | |
| hardwarereset = FALSE; | |
| pccore_cfgupdate(); | |
| pccore_reset(); | |
| } | |
| #if defined(TRACE) | #if defined(TRACE) |
| execcnt++; | execcnt++; |
| if (execcnt >= 60) { | if (execcnt >= 60) { |
| TRACEOUT(("resetcnt = %d / pic %d", resetcnt, piccnt)); | // TRACEOUT(("resetcnt = %d / pic %d", resetcnt, piccnt)); |
| execcnt = 0; | execcnt = 0; |
| resetcnt = 0; | resetcnt = 0; |
| piccnt = 0; | piccnt = 0; |