| version 1.43, 2004/01/09 07:27:15 | version 1.49, 2004/01/23 12:04:07 | 
| Line 53 | Line 53 | 
 | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, | 
 | 1, 0x82, | 1, 0x82, | 
 | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 
| 1, 80, 0, 0, | 3, 1, 80, 0, 0, | 
| {"", ""}, "", "", ""}; | {"", ""}, {"", "", "", ""}, "", "", ""}; | 
 |  |  | 
| PCCORE  pc = {  PCBASECLOCK25, | PCCORE  pccore = {      PCBASECLOCK25, 4, | 
| 4, | 0, PCMODEL_VX, 0, 0, | 
| 4 * PCBASECLOCK25, | 0, 0, | 
| 4 * PCBASECLOCK25 * 50 / 3104, | 4 * PCBASECLOCK25, | 
| 4 * PCBASECLOCK25 * 5 / 3104, | 4 * PCBASECLOCK25 * 50 / 3104, | 
| 4 * PCBASECLOCK25 / 120, | 4 * PCBASECLOCK25 * 5 / 3104, | 
| 4 * PCBASECLOCK25 / 1920, | 4 * PCBASECLOCK25 / 1920, | 
| 4 * PCBASECLOCK25 / 3125, | 4 * PCBASECLOCK25 / 3125, | 
| 4 * PCBASECLOCK25 / 56400, | 100, 20}; | 
| 100, 20, 0, PCMODEL_VX}; |  | 
 |  |  | 
 | // on=0, off=1 | // on=0, off=1 | 
 | //      BYTE    dip_default[3] = {0x3e, 0x63, 0x7a}; | //      BYTE    dip_default[3] = {0x3e, 0x63, 0x7a}; | 
| Line 77  static const BYTE msw_default[8] = | Line 76  static const BYTE msw_default[8] = | 
 | int             soundrenewal = 0; | int             soundrenewal = 0; | 
 | BOOL    drawframe; | BOOL    drawframe; | 
 | UINT    drawcount = 0; | UINT    drawcount = 0; | 
 |  | BOOL    hardwarereset = FALSE; | 
 |  |  | 
 |  |  | 
 | // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- | 
| Line 129  static void setvsyncclock(void) { | Line 129  static void setvsyncclock(void) { | 
 | vs = 1; | vs = 1; | 
 | } | } | 
 | maxy = disp + vs; | maxy = disp + vs; | 
| cnt = (pc.realclock * 5) / 282; | cnt = (pccore.realclock * 5) / 282; | 
| pc.raster = cnt / maxy; | pccore.raster = cnt / maxy; | 
| pc.hsync = (pc.raster * 4) / 5; | pccore.hsync = (pccore.raster * 4) / 5; | 
| pc.dispclock = pc.raster * disp; | pccore.dispclock = pccore.raster * disp; | 
| pc.vsyncclock = cnt - pc.dispclock; | pccore.vsyncclock = cnt - pccore.dispclock; | 
 | } | } | 
 |  |  | 
| static void setpcclock(const char *modelstr, UINT base, UINT multiple) { | static void pccore_set(void) { | 
 |  |  | 
 | UINT8   model; | UINT8   model; | 
 |  | UINT32  multiple; | 
 |  |  | 
 |  | ZeroMemory(&pccore, sizeof(pccore)); | 
 | model = PCMODEL_VX; | model = PCMODEL_VX; | 
| if (!milstr_cmp(modelstr, str_VM)) { | if (!milstr_cmp(np2cfg.model, str_VM)) { | 
 | model = PCMODEL_VM; | model = PCMODEL_VM; | 
 | } | } | 
| else if (!milstr_cmp(modelstr, str_EPSON)) { | else if (!milstr_cmp(np2cfg.model, str_EPSON)) { | 
 | model = PCMODEL_EPSON | PCMODEL_VM; | model = PCMODEL_EPSON | PCMODEL_VM; | 
 | } | } | 
| pc.model = model; | pccore.model = model; | 
 |  |  | 
| if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | 
| pc.baseclock = PCBASECLOCK25;                   // 2.5MHz | pccore.baseclock = PCBASECLOCK25;                       // 2.5MHz | 
| pc.cpumode = 0; | pccore.cpumode = 0; | 
 | } | } | 
 | else { | else { | 
| pc.baseclock = PCBASECLOCK20;                   // 2.0MHz | pccore.baseclock = PCBASECLOCK20;                       // 2.0MHz | 
| pc.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHz; | 
 | } | } | 
 |  | multiple = np2cfg.multiple; | 
 | if (multiple == 0) { | if (multiple == 0) { | 
 | multiple = 1; | multiple = 1; | 
 | } | } | 
 | else if (multiple > 32) { | else if (multiple > 32) { | 
 | multiple = 32; | multiple = 32; | 
 | } | } | 
| pc.multiple = multiple; | pccore.multiple = multiple; | 
| pc.realclock = pc.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; | 
| pc.raster = pc.realclock / 24816;                                                       // ver0.28 | pccore.raster = pccore.realclock / 24816; | 
| pc.hsync = (pc.raster * 4) / 5;                                                         // ver0.28 | pccore.hsync = (pccore.raster * 4) / 5; | 
| pc.dispclock = pc.realclock * 50 / 3102; | pccore.dispclock = pccore.realclock * 50 / 3102; | 
| pc.vsyncclock = pc.realclock * 5 / 3102; | pccore.vsyncclock = pccore.realclock * 5 / 3102; | 
| pc.mouseclock = pc.realclock / 120; | pccore.keyboardclock = pccore.realclock / 1920; | 
| pc.keyboardclock = pc.realclock / 1920; | pccore.midiclock = pccore.realclock / 3125; | 
| pc.midiclock = pc.realclock / 3125; |  | 
| pc.frame1000 = pc.realclock / 56400; | // 拡張メモリ | 
|  | pccore.extmem = 0; | 
|  |  | 
|  | // HDDの接続 (I/Oの使用状態が変わるので.. | 
|  | if (np2cfg.dipsw[1] & 0x20) { | 
|  | pccore.hddif |= PCHDD_IDE; | 
|  | } | 
|  | pccore.hddif |= PCHDD_SCSI; | 
|  |  | 
|  | // サウンドボードの接続 | 
|  | pccore.sound = np2cfg.SOUND_SW; | 
|  |  | 
|  | // その他CBUSの接続 | 
|  | pccore.device = 0; | 
|  | if (np2cfg.pc9861enable) { | 
|  | pccore.device |= PCCBUS_PC9861K; | 
|  | } | 
|  | if (np2cfg.mpuenable) { | 
|  | pccore.device |= PCCBUS_MPU98; | 
|  | } | 
 | } | } | 
 |  |  | 
 |  |  | 
| Line 319  void pccore_reset(void) { | Line 341  void pccore_reset(void) { | 
 | sound_init(); | sound_init(); | 
 | } | } | 
 |  |  | 
| setpcclock(np2cfg.model, np2cfg.baseclock, np2cfg.multiple); | pccore_set(); | 
|  |  | 
 | sound_changeclock(); | sound_changeclock(); | 
 | beep_changeclock(); | beep_changeclock(); | 
 | nevent_init(); | nevent_init(); | 
| Line 329  void pccore_reset(void) { | Line 352  void pccore_reset(void) { | 
 | wavemix_bind(); | wavemix_bind(); | 
 | #endif | #endif | 
 |  |  | 
| if (pc.model & PCMODEL_EPSON) {                         // RAM ctrl | if (pccore.model & PCMODEL_EPSON) {                     // RAM ctrl | 
 | CPU_RAM_D000 = 0xffff; | CPU_RAM_D000 = 0xffff; | 
 | } | } | 
 |  |  | 
| Line 337  void pccore_reset(void) { | Line 360  void pccore_reset(void) { | 
 | cbuscore_reset(); | cbuscore_reset(); | 
 | fmboard_reset(np2cfg.SOUND_SW); | fmboard_reset(np2cfg.SOUND_SW); | 
 |  |  | 
| i286_memorymap((pc.model & PCMODEL_EPSON)?1:0); | i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | 
 | iocore_build(); | iocore_build(); | 
 | iocore_bind(); | iocore_bind(); | 
 | cbuscore_bind(); | cbuscore_bind(); | 
 | fmboard_bind(); | fmboard_bind(); | 
 |  |  | 
 | timing_reset(); |  | 
 | fddmtr_init(); | fddmtr_init(); | 
 | calendar_init(); | calendar_init(); | 
 | vram_init(); | vram_init(); | 
| Line 374  void pccore_reset(void) { | Line 396  void pccore_reset(void) { | 
 | #if defined(SUPPORT_HOSTDRV) | #if defined(SUPPORT_HOSTDRV) | 
 | hostdrv_reset(); | hostdrv_reset(); | 
 | #endif | #endif | 
 |  |  | 
 |  | timing_reset(); | 
 | } | } | 
 |  |  | 
 | static void drawscreen(void) { | static void drawscreen(void) { | 
| Line 534  void screenvsync(NEVENTITEM item) { | Line 558  void screenvsync(NEVENTITEM item) { | 
 | gdc.vsyncint = 0; | gdc.vsyncint = 0; | 
 | pic_setirq(2); | pic_setirq(2); | 
 | } | } | 
| nevent_set(NEVENT_FLAMES, pc.vsyncclock, screendisp, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.vsyncclock, screendisp, NEVENT_RELATIVE); | 
 |  |  | 
| // drawscreenで pc.vsyncclockが変更される可能性があります               // ver0.28 | // drawscreenで pccore.vsyncclockが変更される可能性があります | 
 | if (np2cfg.DISPSYNC) {                                                                                  // ver0.29 | if (np2cfg.DISPSYNC) {                                                                                  // ver0.29 | 
 | drawscreen(); | drawscreen(); | 
 | } | } | 
| Line 546  void screenvsync(NEVENTITEM item) { | Line 570  void screenvsync(NEVENTITEM item) { | 
 |  |  | 
 | // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- | 
 |  |  | 
 |  | // #define      IPTRACE                 (1 << 16) | 
 |  |  | 
 |  | #if IPTRACE | 
 |  | static UINT             trpos; | 
 |  | static UINT32   treip[IPTRACE]; | 
 |  |  | 
 |  | void iptrace_out(void) { | 
 |  |  | 
 |  | FILEH   fh; | 
 |  | UINT    s; | 
 |  | UINT32  eip; | 
 |  | char    buf[32]; | 
 |  |  | 
 |  | s = trpos; | 
 |  | if (s > IPTRACE) { | 
 |  | s -= IPTRACE; | 
 |  | } | 
 |  | else { | 
 |  | s = 0; | 
 |  | } | 
 |  | fh = file_create_c("his.txt"); | 
 |  | while(s < trpos) { | 
 |  | eip = treip[s & (IPTRACE - 1)]; | 
 |  | s++; | 
 |  | SPRINTF(buf, "%.4x:%.4x\r\n", (eip >> 16), eip & 0xffff); | 
 |  | file_write(fh, buf, strlen(buf)); | 
 |  | } | 
 |  | file_close(fh); | 
 |  | } | 
 |  | #endif | 
 |  |  | 
 |  |  | 
 | #if defined(TRACE) | #if defined(TRACE) | 
 | static int resetcnt = 0; | static int resetcnt = 0; | 
 | static int execcnt = 0; | static int execcnt = 0; | 
 | int piccnt = 0; | int piccnt = 0; | 
 |  | int tr = 0; | 
 |  | UINT    cflg; | 
 | #endif | #endif | 
 |  |  | 
 |  |  | 
 | void pccore_exec(BOOL draw) { | void pccore_exec(BOOL draw) { | 
 |  |  | 
 | drawframe = draw; | drawframe = draw; | 
| Line 565  void pccore_exec(BOOL draw) { | Line 624  void pccore_exec(BOOL draw) { | 
 | MEMWAIT_TRAM = np2cfg.wait[0]; | MEMWAIT_TRAM = np2cfg.wait[0]; | 
 | MEMWAIT_VRAM = np2cfg.wait[2]; | MEMWAIT_VRAM = np2cfg.wait[2]; | 
 | MEMWAIT_GRCG = np2cfg.wait[4]; | MEMWAIT_GRCG = np2cfg.wait[4]; | 
| nevent_set(NEVENT_FLAMES, pc.dispclock, screenvsync, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.dispclock, screenvsync, NEVENT_RELATIVE); | 
 |  |  | 
 | //      nevent_get1stevent(); | //      nevent_get1stevent(); | 
 |  |  | 
| Line 589  void pccore_exec(BOOL draw) { | Line 648  void pccore_exec(BOOL draw) { | 
 | #endif | #endif | 
 | } | } | 
 |  |  | 
| #if 1 // ndef TRACE | #if 0 // ndef TRACE | 
 | if (CPU_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { | 
 | if (!(CPU_TYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { | 
 | CPU_EXEC(); | CPU_EXEC(); | 
| Line 600  void pccore_exec(BOOL draw) { | Line 659  void pccore_exec(BOOL draw) { | 
 | } | } | 
 | #else | #else | 
 | while(CPU_REMCLOCK > 0) { | while(CPU_REMCLOCK > 0) { | 
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | #if IPTRACE | 
|  | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | 
|  | trpos++; | 
|  | #endif | 
|  | if (tr) { | 
|  | if ((CPU_CS == 0xf760) || (CPU_CS == 0xf990)) { | 
|  | TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | 
|  | } | 
|  | } | 
|  | #if 0 | 
|  | if ((tr & 2) && (mem[0x0471e] == '\\')) { | 
|  | TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); | 
|  | TRACEOUT(("0471:000e %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | 
|  | mem[0x0471e+0], mem[0x0471e+1], mem[0x0471e+2], mem[0x0471e+3], | 
|  | mem[0x0471e+4], mem[0x0471e+5], mem[0x0471e+6], mem[0x0471e+7])); | 
|  | tr -= 2; | 
|  | } | 
|  | // DOS6 | 
|  | if (CPU_CS == 0xffd0) { | 
|  | if (CPU_IP == 0xc4c2) { | 
|  | TRACEOUT(("DS:DX = %.4x:%.4x / CX = %.4x", CPU_DS, CPU_DX, CPU_CX)); | 
|  | } | 
|  | else if (CPU_IP == 0xc21d) { | 
|  | TRACEOUT(("-> DS:BX = %.4x:%.4x", CPU_DS, CPU_BX)); | 
|  | } | 
|  | } | 
|  | #endif | 
|  | #if 0 | 
|  | if ((CPU_CS == 0x0620) || (CPU_CS == 0x08a0)) { | 
|  | TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | 
|  | } | 
|  | #endif | 
 | i286x_step(); | i286x_step(); | 
 |  | //                      i286c_step(); | 
 | } | } | 
 | #endif | #endif | 
 | nevent_progress(); | nevent_progress(); | 
| Line 613  void pccore_exec(BOOL draw) { | Line 704  void pccore_exec(BOOL draw) { | 
 | S98_sync(); | S98_sync(); | 
 | sound_sync();                                                                                                   // happy! | sound_sync();                                                                                                   // happy! | 
 |  |  | 
 |  | if (hardwarereset) { | 
 |  | hardwarereset = FALSE; | 
 |  | pccore_cfgupdate(); | 
 |  | pccore_reset(); | 
 |  | } | 
 |  |  | 
 | #if defined(TRACE) | #if defined(TRACE) | 
 | execcnt++; | execcnt++; | 
 | if (execcnt >= 60) { | if (execcnt >= 60) { |