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| version 1.40, 2004/01/07 06:53:47 | version 1.44, 2004/01/13 05:30:58 |
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| Line 31 | Line 31 |
| #include "sxsi.h" | #include "sxsi.h" |
| #include "calendar.h" | #include "calendar.h" |
| #include "timing.h" | #include "timing.h" |
| //#include "hostdrv.h" | |
| #include "debugsub.h" | #include "debugsub.h" |
| #if defined(SUPPORT_HOSTDRV) | |
| #include "hostdrv.h" | |
| #endif | |
| const char np2version[] = NP2VER_CORE; | const char np2version[] = NP2VER_CORE; |
| Line 51 | Line 53 |
| 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, |
| 1, 0x82, | 1, 0x82, |
| 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, |
| 1, 80, 0, | 1, 80, 0, 0, |
| {"", ""}, "", ""}; | {"", ""}, "", "", ""}; |
| PCCORE pc = { PCBASECLOCK25, | PCCORE pccore = { PCBASECLOCK25, 4, |
| 4, | 0, PCMODEL_VX, 0, 0, |
| 4 * PCBASECLOCK25, | 0, 0, |
| 4 * PCBASECLOCK25 * 50 / 3104, | 4 * PCBASECLOCK25, |
| 4 * PCBASECLOCK25 * 5 / 3104, | 4 * PCBASECLOCK25 * 50 / 3104, |
| 4 * PCBASECLOCK25 / 120, | 4 * PCBASECLOCK25 * 5 / 3104, |
| 4 * PCBASECLOCK25 / 1920, | 4 * PCBASECLOCK25 / 1920, |
| 4 * PCBASECLOCK25 / 3125, | 4 * PCBASECLOCK25 / 3125, |
| 4 * PCBASECLOCK25 / 56400, | 100, 20}; |
| 100, 20, 0, PCMODEL_VX}; | |
| // on=0, off=1 | // on=0, off=1 |
| // BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; | // BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; |
| Line 127 static void setvsyncclock(void) { | Line 128 static void setvsyncclock(void) { |
| vs = 1; | vs = 1; |
| } | } |
| maxy = disp + vs; | maxy = disp + vs; |
| cnt = (pc.realclock * 5) / 282; | cnt = (pccore.realclock * 5) / 282; |
| pc.raster = cnt / maxy; | pccore.raster = cnt / maxy; |
| pc.hsync = (pc.raster * 4) / 5; | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.raster * disp; | pccore.dispclock = pccore.raster * disp; |
| pc.vsyncclock = cnt - pc.dispclock; | pccore.vsyncclock = cnt - pccore.dispclock; |
| } | } |
| static void setpcclock(const char *modelstr, UINT base, UINT multiple) { | static void setpcclock(const char *modelstr, UINT base, UINT multiple) { |
| Line 145 static void setpcclock(const char *model | Line 146 static void setpcclock(const char *model |
| else if (!milstr_cmp(modelstr, str_EPSON)) { | else if (!milstr_cmp(modelstr, str_EPSON)) { |
| model = PCMODEL_EPSON | PCMODEL_VM; | model = PCMODEL_EPSON | PCMODEL_VM; |
| } | } |
| pc.model = model; | pccore.model = model; |
| if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { |
| pc.baseclock = PCBASECLOCK25; // 2.5MHz | pccore.baseclock = PCBASECLOCK25; // 2.5MHz |
| pc.cpumode = 0; | pccore.cpumode = 0; |
| } | } |
| else { | else { |
| pc.baseclock = PCBASECLOCK20; // 2.0MHz | pccore.baseclock = PCBASECLOCK20; // 2.0MHz |
| pc.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHz; |
| } | } |
| if (multiple == 0) { | if (multiple == 0) { |
| multiple = 1; | multiple = 1; |
| Line 161 static void setpcclock(const char *model | Line 162 static void setpcclock(const char *model |
| else if (multiple > 32) { | else if (multiple > 32) { |
| multiple = 32; | multiple = 32; |
| } | } |
| pc.multiple = multiple; | pccore.multiple = multiple; |
| pc.realclock = pc.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; |
| pc.raster = pc.realclock / 24816; // ver0.28 | pccore.raster = pccore.realclock / 24816; |
| pc.hsync = (pc.raster * 4) / 5; // ver0.28 | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.realclock * 50 / 3102; | pccore.dispclock = pccore.realclock * 50 / 3102; |
| pc.vsyncclock = pc.realclock * 5 / 3102; | pccore.vsyncclock = pccore.realclock * 5 / 3102; |
| pc.mouseclock = pc.realclock / 120; | pccore.keyboardclock = pccore.realclock / 1920; |
| pc.keyboardclock = pc.realclock / 1920; | pccore.midiclock = pccore.realclock / 3125; |
| pc.midiclock = pc.realclock / 3125; | |
| pc.frame1000 = pc.realclock / 56400; | |
| } | } |
| Line 185 static void sound_init(void) { | Line 184 static void sound_init(void) { |
| rate = 0; | rate = 0; |
| } | } |
| sound_create(rate, np2cfg.delayms); | sound_create(rate, np2cfg.delayms); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_initialize(rate); | |
| #endif | |
| beep_initialize(rate); | beep_initialize(rate); |
| beep_setvol(np2cfg.BEEP_VOL); | beep_setvol(np2cfg.BEEP_VOL); |
| tms3631_initialize(rate); | tms3631_initialize(rate); |
| Line 205 static void sound_init(void) { | Line 207 static void sound_init(void) { |
| static void sound_term(void) { | static void sound_term(void) { |
| soundmng_stop(); | soundmng_stop(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_deinitialize(); | |
| #endif | |
| rhythm_deinitialize(); | rhythm_deinitialize(); |
| sound_destroy(); | sound_destroy(); |
| } | } |
| Line 233 void pccore_init(void) { | Line 238 void pccore_init(void) { |
| pc9861k_construct(); | pc9861k_construct(); |
| iocore_create(); | iocore_create(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_initialize(); | |
| #endif | |
| } | } |
| void pccore_term(void) { | void pccore_term(void) { |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_deinitialize(); | |
| #endif | |
| sound_term(); | sound_term(); |
| fdd_eject(0); | fdd_eject(0); |
| Line 277 void pccore_reset(void) { | Line 290 void pccore_reset(void) { |
| int i; | int i; |
| // reset_hostdrv(); | |
| ZeroMemory(mem, 0x10fff0); // ver0.28 | ZeroMemory(mem, 0x10fff0); // ver0.28 |
| ZeroMemory(mem + VRAM1_B, 0x18000); | ZeroMemory(mem + VRAM1_B, 0x18000); |
| ZeroMemory(mem + VRAM1_E, 0x08000); | ZeroMemory(mem + VRAM1_E, 0x08000); |
| Line 311 void pccore_reset(void) { | Line 322 void pccore_reset(void) { |
| nevent_init(); | nevent_init(); |
| sound_reset(); | sound_reset(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_bind(); | |
| #endif | |
| if (pc.model & PCMODEL_EPSON) { // RAM ctrl | if (pccore.model & PCMODEL_EPSON) { // RAM ctrl |
| CPU_RAM_D000 = 0xffff; | CPU_RAM_D000 = 0xffff; |
| } | } |
| Line 320 void pccore_reset(void) { | Line 334 void pccore_reset(void) { |
| cbuscore_reset(); | cbuscore_reset(); |
| fmboard_reset(np2cfg.SOUND_SW); | fmboard_reset(np2cfg.SOUND_SW); |
| i286_memorymap((pc.model & PCMODEL_EPSON)?1:0); | i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); |
| iocore_build(); | iocore_build(); |
| iocore_bind(); | iocore_bind(); |
| cbuscore_bind(); | cbuscore_bind(); |
| Line 353 void pccore_reset(void) { | Line 367 void pccore_reset(void) { |
| sysmng_cpureset(); | sysmng_cpureset(); |
| soundmng_play(); | soundmng_play(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_reset(); | |
| #endif | |
| } | } |
| static void drawscreen(void) { | static void drawscreen(void) { |
| Line 513 void screenvsync(NEVENTITEM item) { | Line 531 void screenvsync(NEVENTITEM item) { |
| gdc.vsyncint = 0; | gdc.vsyncint = 0; |
| pic_setirq(2); | pic_setirq(2); |
| } | } |
| nevent_set(NEVENT_FLAMES, pc.vsyncclock, screendisp, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.vsyncclock, screendisp, NEVENT_RELATIVE); |
| // drawscreenで pc.vsyncclockが変更される可能性があります // ver0.28 | // drawscreenで pccore.vsyncclockが変更される可能性があります |
| if (np2cfg.DISPSYNC) { // ver0.29 | if (np2cfg.DISPSYNC) { // ver0.29 |
| drawscreen(); | drawscreen(); |
| } | } |
| Line 544 void pccore_exec(BOOL draw) { | Line 562 void pccore_exec(BOOL draw) { |
| MEMWAIT_TRAM = np2cfg.wait[0]; | MEMWAIT_TRAM = np2cfg.wait[0]; |
| MEMWAIT_VRAM = np2cfg.wait[2]; | MEMWAIT_VRAM = np2cfg.wait[2]; |
| MEMWAIT_GRCG = np2cfg.wait[4]; | MEMWAIT_GRCG = np2cfg.wait[4]; |
| nevent_set(NEVENT_FLAMES, pc.dispclock, screenvsync, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.dispclock, screenvsync, NEVENT_RELATIVE); |
| // nevent_get1stevent(); | // nevent_get1stevent(); |