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| version 1.44, 2004/01/13 05:30:58 | version 1.49, 2004/01/23 12:04:07 |
|---|---|
| Line 53 | Line 53 |
| 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, |
| 1, 0x82, | 1, 0x82, |
| 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, |
| 1, 80, 0, 0, | 3, 1, 80, 0, 0, |
| {"", ""}, "", "", ""}; | {"", ""}, {"", "", "", ""}, "", "", ""}; |
| PCCORE pccore = { PCBASECLOCK25, 4, | PCCORE pccore = { PCBASECLOCK25, 4, |
| 0, PCMODEL_VX, 0, 0, | 0, PCMODEL_VX, 0, 0, |
| Line 76 static const BYTE msw_default[8] = | Line 76 static const BYTE msw_default[8] = |
| int soundrenewal = 0; | int soundrenewal = 0; |
| BOOL drawframe; | BOOL drawframe; |
| UINT drawcount = 0; | UINT drawcount = 0; |
| BOOL hardwarereset = FALSE; | |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| Line 135 static void setvsyncclock(void) { | Line 136 static void setvsyncclock(void) { |
| pccore.vsyncclock = cnt - pccore.dispclock; | pccore.vsyncclock = cnt - pccore.dispclock; |
| } | } |
| static void setpcclock(const char *modelstr, UINT base, UINT multiple) { | static void pccore_set(void) { |
| UINT8 model; | UINT8 model; |
| UINT32 multiple; | |
| ZeroMemory(&pccore, sizeof(pccore)); | |
| model = PCMODEL_VX; | model = PCMODEL_VX; |
| if (!milstr_cmp(modelstr, str_VM)) { | if (!milstr_cmp(np2cfg.model, str_VM)) { |
| model = PCMODEL_VM; | model = PCMODEL_VM; |
| } | } |
| else if (!milstr_cmp(modelstr, str_EPSON)) { | else if (!milstr_cmp(np2cfg.model, str_EPSON)) { |
| model = PCMODEL_EPSON | PCMODEL_VM; | model = PCMODEL_EPSON | PCMODEL_VM; |
| } | } |
| pccore.model = model; | pccore.model = model; |
| if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { |
| pccore.baseclock = PCBASECLOCK25; // 2.5MHz | pccore.baseclock = PCBASECLOCK25; // 2.5MHz |
| pccore.cpumode = 0; | pccore.cpumode = 0; |
| } | } |
| Line 156 static void setpcclock(const char *model | Line 159 static void setpcclock(const char *model |
| pccore.baseclock = PCBASECLOCK20; // 2.0MHz | pccore.baseclock = PCBASECLOCK20; // 2.0MHz |
| pccore.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHz; |
| } | } |
| multiple = np2cfg.multiple; | |
| if (multiple == 0) { | if (multiple == 0) { |
| multiple = 1; | multiple = 1; |
| } | } |
| Line 170 static void setpcclock(const char *model | Line 174 static void setpcclock(const char *model |
| pccore.vsyncclock = pccore.realclock * 5 / 3102; | pccore.vsyncclock = pccore.realclock * 5 / 3102; |
| pccore.keyboardclock = pccore.realclock / 1920; | pccore.keyboardclock = pccore.realclock / 1920; |
| pccore.midiclock = pccore.realclock / 3125; | pccore.midiclock = pccore.realclock / 3125; |
| // 拡張メモリ | |
| pccore.extmem = 0; | |
| // HDDの接続 (I/Oの使用状態が変わるので.. | |
| if (np2cfg.dipsw[1] & 0x20) { | |
| pccore.hddif |= PCHDD_IDE; | |
| } | |
| pccore.hddif |= PCHDD_SCSI; | |
| // サウンドボードの接続 | |
| pccore.sound = np2cfg.SOUND_SW; | |
| // その他CBUSの接続 | |
| pccore.device = 0; | |
| if (np2cfg.pc9861enable) { | |
| pccore.device |= PCCBUS_PC9861K; | |
| } | |
| if (np2cfg.mpuenable) { | |
| pccore.device |= PCCBUS_MPU98; | |
| } | |
| } | } |
| Line 316 void pccore_reset(void) { | Line 341 void pccore_reset(void) { |
| sound_init(); | sound_init(); |
| } | } |
| setpcclock(np2cfg.model, np2cfg.baseclock, np2cfg.multiple); | pccore_set(); |
| sound_changeclock(); | sound_changeclock(); |
| beep_changeclock(); | beep_changeclock(); |
| nevent_init(); | nevent_init(); |
| Line 340 void pccore_reset(void) { | Line 366 void pccore_reset(void) { |
| cbuscore_bind(); | cbuscore_bind(); |
| fmboard_bind(); | fmboard_bind(); |
| timing_reset(); | |
| fddmtr_init(); | fddmtr_init(); |
| calendar_init(); | calendar_init(); |
| vram_init(); | vram_init(); |
| Line 371 void pccore_reset(void) { | Line 396 void pccore_reset(void) { |
| #if defined(SUPPORT_HOSTDRV) | #if defined(SUPPORT_HOSTDRV) |
| hostdrv_reset(); | hostdrv_reset(); |
| #endif | #endif |
| timing_reset(); | |
| } | } |
| static void drawscreen(void) { | static void drawscreen(void) { |
| Line 543 void screenvsync(NEVENTITEM item) { | Line 570 void screenvsync(NEVENTITEM item) { |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| // #define IPTRACE (1 << 16) | |
| #if IPTRACE | |
| static UINT trpos; | |
| static UINT32 treip[IPTRACE]; | |
| void iptrace_out(void) { | |
| FILEH fh; | |
| UINT s; | |
| UINT32 eip; | |
| char buf[32]; | |
| s = trpos; | |
| if (s > IPTRACE) { | |
| s -= IPTRACE; | |
| } | |
| else { | |
| s = 0; | |
| } | |
| fh = file_create_c("his.txt"); | |
| while(s < trpos) { | |
| eip = treip[s & (IPTRACE - 1)]; | |
| s++; | |
| SPRINTF(buf, "%.4x:%.4x\r\n", (eip >> 16), eip & 0xffff); | |
| file_write(fh, buf, strlen(buf)); | |
| } | |
| file_close(fh); | |
| } | |
| #endif | |
| #if defined(TRACE) | #if defined(TRACE) |
| static int resetcnt = 0; | static int resetcnt = 0; |
| static int execcnt = 0; | static int execcnt = 0; |
| int piccnt = 0; | int piccnt = 0; |
| int tr = 0; | |
| UINT cflg; | |
| #endif | #endif |
| void pccore_exec(BOOL draw) { | void pccore_exec(BOOL draw) { |
| drawframe = draw; | drawframe = draw; |
| Line 586 void pccore_exec(BOOL draw) { | Line 648 void pccore_exec(BOOL draw) { |
| #endif | #endif |
| } | } |
| #if 1 // ndef TRACE | #if 0 // ndef TRACE |
| if (CPU_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { |
| if (!(CPU_TYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { |
| CPU_EXEC(); | CPU_EXEC(); |
| Line 597 void pccore_exec(BOOL draw) { | Line 659 void pccore_exec(BOOL draw) { |
| } | } |
| #else | #else |
| while(CPU_REMCLOCK > 0) { | while(CPU_REMCLOCK > 0) { |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | #if IPTRACE |
| treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | |
| trpos++; | |
| #endif | |
| if (tr) { | |
| if ((CPU_CS == 0xf760) || (CPU_CS == 0xf990)) { | |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | |
| } | |
| } | |
| #if 0 | |
| if ((tr & 2) && (mem[0x0471e] == '\\')) { | |
| TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); | |
| TRACEOUT(("0471:000e %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | |
| mem[0x0471e+0], mem[0x0471e+1], mem[0x0471e+2], mem[0x0471e+3], | |
| mem[0x0471e+4], mem[0x0471e+5], mem[0x0471e+6], mem[0x0471e+7])); | |
| tr -= 2; | |
| } | |
| // DOS6 | |
| if (CPU_CS == 0xffd0) { | |
| if (CPU_IP == 0xc4c2) { | |
| TRACEOUT(("DS:DX = %.4x:%.4x / CX = %.4x", CPU_DS, CPU_DX, CPU_CX)); | |
| } | |
| else if (CPU_IP == 0xc21d) { | |
| TRACEOUT(("-> DS:BX = %.4x:%.4x", CPU_DS, CPU_BX)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if ((CPU_CS == 0x0620) || (CPU_CS == 0x08a0)) { | |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | |
| } | |
| #endif | |
| i286x_step(); | i286x_step(); |
| // i286c_step(); | |
| } | } |
| #endif | #endif |
| nevent_progress(); | nevent_progress(); |
| Line 610 void pccore_exec(BOOL draw) { | Line 704 void pccore_exec(BOOL draw) { |
| S98_sync(); | S98_sync(); |
| sound_sync(); // happy! | sound_sync(); // happy! |
| if (hardwarereset) { | |
| hardwarereset = FALSE; | |
| pccore_cfgupdate(); | |
| pccore_reset(); | |
| } | |
| #if defined(TRACE) | #if defined(TRACE) |
| execcnt++; | execcnt++; |
| if (execcnt >= 60) { | if (execcnt >= 60) { |