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| version 1.10, 2003/10/25 19:10:37 | version 1.53, 2004/01/25 06:01:31 |
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| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "strres.h" | |
| #include "dosio.h" | |
| #include "soundmng.h" | #include "soundmng.h" |
| #include "sysmng.h" | #include "sysmng.h" |
| #include "timemng.h" | #include "timemng.h" |
| #include "i286.h" | #include "cpucore.h" |
| #include "memory.h" | |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "cbuscore.h" | #include "cbuscore.h" |
| #include "pc9861k.h" | #include "pc9861k.h" |
| #include "mpu98ii.h" | #include "mpu98ii.h" |
| #include "bios.h" | #include "bios.h" |
| #include "biosmem.h" | |
| #include "vram.h" | #include "vram.h" |
| #include "scrndraw.h" | #include "scrndraw.h" |
| #include "dispsync.h" | #include "dispsync.h" |
| Line 20 | Line 22 |
| #include "sound.h" | #include "sound.h" |
| #include "fmboard.h" | #include "fmboard.h" |
| #include "beep.h" | #include "beep.h" |
| #include "s98.h" | |
| #include "font.h" | #include "font.h" |
| #include "diskdrv.h" | #include "diskdrv.h" |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_mtr.h" | #include "fdd_mtr.h" |
| #include "sxsi.h" | #include "sxsi.h" |
| #if defined(SUPPORT_HOSTDRV) | |
| #include "hostdrv.h" | |
| #endif | |
| #include "np2ver.h" | |
| #include "calendar.h" | #include "calendar.h" |
| #include "timing.h" | #include "timing.h" |
| //#include "hostdrv.h" | #include "debugsub.h" |
| const char np2version[] = "ver.0.38"; | const char np2version[] = NP2VER_CORE; |
| NP2CFG np2cfg = { | NP2CFG np2cfg = { |
| PCBASECLOCK25, 4, 0, | 0, 1, 0, 32, 0, 0, 0x40, |
| {0x3e, 0x63, 0x7a}, | 0, 0, 0, 0, |
| {0x48, 0x05, 0x0c, 0x00, 0x01, 0x00, 0x00, 0x6E}, | {0x3e, 0x63, 0x7a}, 0, |
| {0x0c, 0x08, 0x0c, 0x06, 0x03, 0x0c}, // ver0.27 | 0, 0, {1, 1, 6, 1, 8, 1}, |
| {1, 1, 6, 1, 8, 1}, | |
| 0, 4, 32, 22050, 800, 0, 1, 1, 0, | "VX", PCBASECLOCK25, 4, |
| 0, 0, | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}, |
| 0, {0, 0, 0}, 0xd1, 0x7f, 0xd1, 0, 0, 1, 0x82, // ver0.30 | 1, 1, 2, 1, 0x000000, 0xffffff, |
| 1, 80, 3, 1, 1, 0, 0x000000, 0xffffff, | 22050, 800, 4, 0, |
| 0, 0, 0, 0x40, 0, | {0, 0, 0}, 0xd1, 0x7f, 0xd1, 0, 0, 1, |
| 64, 64, 64, 64, 64, // ver0.27 | 3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64, |
| 1, 0x82, | |
| 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, |
| 2, 1, 0, 0, | 3, 1, 80, 0, 0, |
| {"", ""}, ""}; | {"", ""}, {"", "", "", ""}, "", "", ""}; |
| PCCORE pc = { PCBASECLOCK25, | PCCORE pccore = { PCBASECLOCK25, 4, |
| 4, | 0, PCMODEL_VX, 0, 0, |
| 4 * PCBASECLOCK25, | 0, 0, |
| 4 * PCBASECLOCK25 * 50 / 3104, | 4 * PCBASECLOCK25, |
| 4 * PCBASECLOCK25 * 5 / 3104, | 4 * PCBASECLOCK25 * 50 / 3104, |
| 4 * PCBASECLOCK25 / 120, | 4 * PCBASECLOCK25 * 5 / 3104, |
| 4 * PCBASECLOCK25 / 1920, | 4 * PCBASECLOCK25 / 1920, |
| 4 * PCBASECLOCK25 / 3125, | 4 * PCBASECLOCK25 / 3125, |
| (4 * PCBASECLOCK25 / 56400), | 100, 20}; |
| 100, 20, | |
| 0}; | |
| // on=0, off=1 | // on=0, off=1 |
| BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; | // BYTE dip_default[3] = {0x3e, 0x63, 0x7a}; |
| BYTE msw_default[8] = {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6E}; | static const BYTE msw_default[8] = |
| {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}; | |
| BYTE screenupdate = 3; | BYTE screenupdate = 3; |
| int screendispflag = 1; | int screendispflag = 1; |
| int soundrenewal = 0; | int soundrenewal = 0; |
| BOOL drawframe; | BOOL drawframe; |
| UINT drawcount = 0; | UINT drawcount = 0; |
| BOOL hardwarereset = FALSE; | |
| BYTE mem[0x200000]; // ver0.28 | |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| static void setvsyncclock(void) { // ver0.28 | void getbiospath(char *path, const char *fname, int maxlen) { |
| const char *p; | |
| p = np2cfg.biospath; | |
| if (p[0]) { | |
| file_cpyname(path, p, maxlen); | |
| file_setseparator(path, maxlen); | |
| file_catname(path, fname, maxlen); | |
| } | |
| else { | |
| file_cpyname(path, file_getcd(fname), maxlen); | |
| } | |
| } | |
| // ---- | |
| static void setvsyncclock(void) { | |
| UINT vfp; | UINT vfp; |
| UINT vbp; | UINT vbp; |
| Line 105 static void setvsyncclock(void) { | Line 129 static void setvsyncclock(void) { |
| vs = 1; | vs = 1; |
| } | } |
| maxy = disp + vs; | maxy = disp + vs; |
| cnt = (pc.realclock * 5) / 282; | cnt = (pccore.realclock * 5) / 282; |
| pc.raster = cnt / maxy; | pccore.raster = cnt / maxy; |
| pc.hsync = (pc.raster * 4) / 5; | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.raster * disp; | pccore.dispclock = pccore.raster * disp; |
| pc.vsyncclock = cnt - pc.dispclock; | pccore.vsyncclock = cnt - pccore.dispclock; |
| } | } |
| static void setpcclock(UINT base, UINT multiple) { // ver0.28 | static void pccore_set(void) { |
| if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | UINT8 model; |
| pc.baseclock = PCBASECLOCK25; // 2.5MHz | UINT32 multiple; |
| pc.cpumode = 0; | |
| ZeroMemory(&pccore, sizeof(pccore)); | |
| model = PCMODEL_VX; | |
| if (!milstr_cmp(np2cfg.model, str_VM)) { | |
| model = PCMODEL_VM; | |
| } | |
| else if (!milstr_cmp(np2cfg.model, str_EPSON)) { | |
| model = PCMODEL_EPSON | PCMODEL_VM; | |
| } | |
| pccore.model = model; | |
| if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { | |
| pccore.baseclock = PCBASECLOCK25; // 2.5MHz | |
| pccore.cpumode = 0; | |
| } | } |
| else { | else { |
| pc.baseclock = PCBASECLOCK20; // 2.0MHz | pccore.baseclock = PCBASECLOCK20; // 2.0MHz |
| pc.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHz; |
| } | } |
| multiple = np2cfg.multiple; | |
| if (multiple == 0) { | if (multiple == 0) { |
| multiple = 1; | multiple = 1; |
| } | } |
| else if (multiple > 32) { | else if (multiple > 32) { |
| multiple = 32; | multiple = 32; |
| } | } |
| pc.multiple = multiple; | pccore.multiple = multiple; |
| pc.realclock = pc.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; |
| pc.raster = pc.realclock / 24816; // ver0.28 | pccore.raster = pccore.realclock / 24816; |
| pc.hsync = (pc.raster * 4) / 5; // ver0.28 | pccore.hsync = (pccore.raster * 4) / 5; |
| pc.dispclock = pc.realclock * 50 / 3102; | pccore.dispclock = pccore.realclock * 50 / 3102; |
| pc.vsyncclock = pc.realclock * 5 / 3102; | pccore.vsyncclock = pccore.realclock * 5 / 3102; |
| pc.mouseclock = pc.realclock / 120; | pccore.keyboardclock = pccore.realclock / 1920; |
| pc.keyboardclock = pc.realclock / 1920; | pccore.midiclock = pccore.realclock / 3125; |
| pc.midiclock = pc.realclock / 3125; | |
| pc.frame1000 = pc.realclock / 56400; | // 拡張メモリ |
| if (!(np2cfg.dipsw[2] & 0x80)) { | |
| pccore.extmem = np2cfg.EXTMEM; | |
| } | |
| // HDDの接続 (I/Oの使用状態が変わるので.. | |
| if (np2cfg.dipsw[1] & 0x20) { | |
| pccore.hddif |= PCHDD_IDE; | |
| } | |
| #if defined(SUPPORT_SCSI) | |
| pccore.hddif |= PCHDD_SCSI; | |
| #endif | |
| // サウンドボードの接続 | |
| pccore.sound = np2cfg.SOUND_SW; | |
| // その他CBUSの接続 | |
| pccore.device = 0; | |
| if (np2cfg.pc9861enable) { | |
| pccore.device |= PCCBUS_PC9861K; | |
| } | |
| if (np2cfg.mpuenable) { | |
| pccore.device |= PCCBUS_MPU98; | |
| } | |
| } | } |
| Line 152 static void sound_init(void) { | Line 213 static void sound_init(void) { |
| rate = 0; | rate = 0; |
| } | } |
| sound_create(rate, np2cfg.delayms); | sound_create(rate, np2cfg.delayms); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_initialize(rate); | |
| #endif | |
| beep_initialize(rate); | beep_initialize(rate); |
| beep_setvol(np2cfg.BEEP_VOL); | beep_setvol(np2cfg.BEEP_VOL); |
| tms3631_initialize(rate); | tms3631_initialize(rate); |
| Line 166 static void sound_init(void) { | Line 230 static void sound_init(void) { |
| adpcm_setvol(np2cfg.vol_adpcm); | adpcm_setvol(np2cfg.vol_adpcm); |
| pcm86gen_initialize(rate); | pcm86gen_initialize(rate); |
| pcm86gen_setvol(np2cfg.vol_pcm); | pcm86gen_setvol(np2cfg.vol_pcm); |
| cs4231_initialize(rate); | |
| } | } |
| static void sound_term(void) { | static void sound_term(void) { |
| soundmng_stop(); | soundmng_stop(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_deinitialize(); | |
| #endif | |
| rhythm_deinitialize(); | rhythm_deinitialize(); |
| sound_destroy(); | sound_destroy(); |
| } | } |
| void pccore_init(void) { | void pccore_init(void) { |
| CPU_INITIALIZE(); | |
| pal_initlcdtable(); | pal_initlcdtable(); |
| pal_makelcdpal(); | pal_makelcdpal(); |
| pal_makeskiptable(); | pal_makeskiptable(); |
| Line 197 void pccore_init(void) { | Line 267 void pccore_init(void) { |
| pc9861k_construct(); | pc9861k_construct(); |
| iocore_create(); | iocore_create(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_initialize(); | |
| #endif | |
| } | } |
| void pccore_term(void) { | void pccore_term(void) { |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_deinitialize(); | |
| #endif | |
| sound_term(); | sound_term(); |
| fdd_eject(0); | fdd_eject(0); |
| Line 208 void pccore_term(void) { | Line 286 void pccore_term(void) { |
| fdd_eject(2); | fdd_eject(2); |
| fdd_eject(3); | fdd_eject(3); |
| extmemmng_clear(); // ver0.28 | |
| iocore_destroy(); | iocore_destroy(); |
| pc9861k_destruct(); | pc9861k_destruct(); |
| Line 217 void pccore_term(void) { | Line 293 void pccore_term(void) { |
| mpu98ii_destruct(); | mpu98ii_destruct(); |
| sxsi_trash(); | sxsi_trash(); |
| CPU_DEINITIALIZE(); | |
| } | } |
| Line 227 void pccore_cfgupdate(void) { | Line 305 void pccore_cfgupdate(void) { |
| renewal = FALSE; | renewal = FALSE; |
| for (i=0; i<8; i++) { | for (i=0; i<8; i++) { |
| if (np2cfg.memsw[i] != mem[0xa3fe2 + i*4]) { | if (np2cfg.memsw[i] != mem[MEMB_MSW + i*4]) { |
| np2cfg.memsw[i] = mem[0xa3fe2 + i*4]; | np2cfg.memsw[i] = mem[MEMB_MSW + i*4]; |
| renewal = TRUE; | renewal = TRUE; |
| } | } |
| } | } |
| Line 241 void pccore_reset(void) { | Line 319 void pccore_reset(void) { |
| int i; | int i; |
| // reset_hostdrv(); | soundmng_stop(); |
| if (soundrenewal) { | |
| soundrenewal = 0; | |
| sound_term(); | |
| sound_init(); | |
| } | |
| ZeroMemory(mem, 0x10fff0); // ver0.28 | ZeroMemory(mem, 0x110000); // ver0.28 |
| ZeroMemory(mem + VRAM1_B, 0x18000); | ZeroMemory(mem + VRAM1_B, 0x18000); |
| ZeroMemory(mem + VRAM1_E, 0x08000); | ZeroMemory(mem + VRAM1_E, 0x08000); |
| ZeroMemory(mem + FONT_ADRS, 0x08000); | ZeroMemory(mem + FONT_ADRS, 0x08000); |
| i286_reset(); | |
| CPUTYPE = 0; | |
| if (np2cfg.dipsw[2] & 0x80) { | |
| CPUTYPE = CPUTYPE_V30; | |
| } | |
| //メモリスイッチ | //メモリスイッチ |
| for (i=0; i<8; i++) { | for (i=0; i<8; i++) { |
| mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; |
| } | } |
| fddfile_reset2dmode(); | pccore_set(); |
| bios0x18_16(0x20, 0xe1); | nevent_init(); |
| soundmng_stop(); | CPU_RESET(); |
| if (soundrenewal) { | CPU_SETEXTSIZE((UINT32)pccore.extmem); |
| soundrenewal = 0; | |
| sound_term(); | CPU_TYPE = 0; |
| sound_init(); | if (np2cfg.dipsw[2] & 0x80) { |
| CPU_TYPE = CPUTYPE_V30; | |
| } | |
| if (pccore.model & PCMODEL_EPSON) { // RAM ctrl | |
| CPU_RAM_D000 = 0xffff; | |
| } | } |
| setpcclock(np2cfg.baseclock, np2cfg.multiple); | |
| sound_changeclock(); | sound_changeclock(); |
| beep_changeclock(); | beep_changeclock(); |
| nevent_init(); | |
| sound_reset(); | sound_reset(); |
| #if defined(SUPPORT_WAVEMIX) | |
| wavemix_bind(); | |
| #endif | |
| fddfile_reset2dmode(); | |
| bios0x18_16(0x20, 0xe1); | |
| iocore_reset(); // サウンドでpicを呼ぶので… | iocore_reset(); // サウンドでpicを呼ぶので… |
| cbuscore_reset(); | cbuscore_reset(); |
| fmboard_reset(np2cfg.SOUND_SW); | fmboard_reset(pccore.sound); |
| i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | |
| iocore_build(); | iocore_build(); |
| iocore_bind(); | iocore_bind(); |
| cbuscore_bind(); | cbuscore_bind(); |
| fmboard_bind(); | fmboard_bind(); |
| timing_reset(); | |
| fddmtr_init(); | fddmtr_init(); |
| calendar_init(); | calendar_init(); |
| vram_init(); | vram_init(); |
| Line 297 void pccore_reset(void) { | Line 381 void pccore_reset(void) { |
| if (np2cfg.ITF_WORK) { | if (np2cfg.ITF_WORK) { |
| CS_BASE = 0xf0000; | CS_BASE = 0xf0000; |
| I286_CS = 0xf000; | CPU_CS = 0xf000; |
| I286_IP = 0xfff0; | CPU_IP = 0xfff0; |
| } | } |
| else { | else { |
| for (i=0; i<8; i++) { | for (i=0; i<8; i++) { |
| mem[0xa3fe2 + i*4] = msw_default[i]; | mem[0xa3fe2 + i*4] = msw_default[i]; |
| } | } |
| CS_BASE = 0xfd800; | CS_BASE = 0xfd800; |
| I286_CS = 0xfd80; | CPU_CS = 0xfd80; |
| I286_IP = 0x0002; | CPU_IP = 0x0002; |
| } | } |
| i286_resetprefetch(); | CPU_CLEARPREFETCH(); |
| sysmng_cpureset(); | sysmng_cpureset(); |
| #if defined(SUPPORT_HOSTDRV) | |
| hostdrv_reset(); | |
| #endif | |
| timing_reset(); | |
| soundmng_play(); | soundmng_play(); |
| } | } |
| Line 463 void screendisp(NEVENTITEM item) { | Line 552 void screendisp(NEVENTITEM item) { |
| void screenvsync(NEVENTITEM item) { | void screenvsync(NEVENTITEM item) { |
| vramop.tramwait = np2cfg.wait[1]; | MEMWAIT_TRAM = np2cfg.wait[1]; |
| vramop.vramwait = np2cfg.wait[3]; | MEMWAIT_VRAM = np2cfg.wait[3]; |
| vramop.grcgwait = np2cfg.wait[5]; | MEMWAIT_GRCG = np2cfg.wait[5]; |
| gdc_work(GDCWORK_MASTER); | gdc_work(GDCWORK_MASTER); |
| gdc.vsync = 0x20; | gdc.vsync = 0x20; |
| if (gdc.vsyncint) { | if (gdc.vsyncint) { |
| gdc.vsyncint = 0; | gdc.vsyncint = 0; |
| pic_setirq(2); | pic_setirq(2); |
| } | } |
| nevent_set(NEVENT_FLAMES, pc.vsyncclock, screendisp, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.vsyncclock, screendisp, NEVENT_RELATIVE); |
| // drawscreenで pc.vsyncclockが変更される可能性があります // ver0.28 | // drawscreenで pccore.vsyncclockが変更される可能性があります |
| if (np2cfg.DISPSYNC) { // ver0.29 | if (np2cfg.DISPSYNC) { // ver0.29 |
| drawscreen(); | drawscreen(); |
| } | } |
| (void)item; | (void)item; |
| } | } |
| // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- |
| // #define IPTRACE (1 << 12) | |
| #if defined(TRACE) && IPTRACE | |
| static UINT trpos = 0; | |
| static UINT32 treip[IPTRACE]; | |
| void iptrace_out(void) { | |
| FILEH fh; | |
| UINT s; | |
| UINT32 eip; | |
| char buf[32]; | |
| s = trpos; | |
| if (s > IPTRACE) { | |
| s -= IPTRACE; | |
| } | |
| else { | |
| s = 0; | |
| } | |
| fh = file_create_c("his.txt"); | |
| while(s < trpos) { | |
| eip = treip[s & (IPTRACE - 1)]; | |
| s++; | |
| SPRINTF(buf, "%.4x:%.4x\r\n", (eip >> 16), eip & 0xffff); | |
| file_write(fh, buf, strlen(buf)); | |
| } | |
| file_close(fh); | |
| } | |
| #endif | |
| #if defined(TRACE) | |
| static int resetcnt = 0; | |
| static int execcnt = 0; | |
| int piccnt = 0; | |
| int tr = 0; | |
| UINT cflg; | |
| #endif | |
| void pccore_exec(BOOL draw) { | void pccore_exec(BOOL draw) { |
| drawframe = draw; | drawframe = draw; |
| Line 493 void pccore_exec(BOOL draw) { | Line 624 void pccore_exec(BOOL draw) { |
| gdc.vsync = 0; | gdc.vsync = 0; |
| screendispflag = 1; | screendispflag = 1; |
| vramop.tramwait = np2cfg.wait[0]; | MEMWAIT_TRAM = np2cfg.wait[0]; |
| vramop.vramwait = np2cfg.wait[2]; | MEMWAIT_VRAM = np2cfg.wait[2]; |
| vramop.grcgwait = np2cfg.wait[4]; | MEMWAIT_GRCG = np2cfg.wait[4]; |
| nevent_set(NEVENT_FLAMES, pc.dispclock, screenvsync, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, pccore.dispclock, screenvsync, NEVENT_RELATIVE); |
| // nevent_get1stevent(); | // nevent_get1stevent(); |
| while(screendispflag) { | while(screendispflag) { |
| #if defined(TRACE) | |
| resetcnt++; | |
| #endif | |
| pic_irq(); | pic_irq(); |
| if (cpuio.reset_req) { | if (CPU_RESETREQ) { |
| cpuio.reset_req = 0; | CPU_RESETREQ = 0; |
| I286_CS = 0xf000; | #if 1 |
| CPU_SHUT(); | |
| #else | |
| CPU_CS = 0xf000; | |
| CS_BASE = 0xf0000; | CS_BASE = 0xf0000; |
| I286_IP = 0xfff0; | CPU_IP = 0xfff0; |
| #ifdef CPU386 // defineを変えてね | #if defined(CPUCORE_IA32) |
| I286_DX = 0x0300; | CPU_DX = 0x0300; |
| #endif | |
| CPU_CLEARPREFETCH(); | |
| #endif | #endif |
| i286_resetprefetch(); | |
| } | } |
| #if 1 // ndef TRACE | #if 1 // ndef TRACE |
| if (I286_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { |
| if (!(CPUTYPE & CPUTYPE_V30)) { | if (!(CPU_TYPE & CPUTYPE_V30)) { |
| i286(); | CPU_EXEC(); |
| } | } |
| else { | else { |
| v30(); | CPU_EXECV30(); |
| } | } |
| } | } |
| #else | #else |
| while(nevent.remainclock > 0) { | while(CPU_REMCLOCK > 0) { |
| { | #if IPTRACE |
| static FILEH fh = FILEH_INVALID; | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; |
| if (I286_CS == 0x0e14) { | trpos++; |
| if (fh == FILEH_INVALID) { | #endif |
| fh = file_create("log.txt"); | #if 0 |
| } | if (tr) { |
| } | if ((CPU_CS == 0xf760) || (CPU_CS == 0xf990)) { |
| if (fh != FILEH_INVALID) { | TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); |
| char buf[32]; | } |
| wsprintf(buf, "%.4x:%.4x\r\n", I286_CS, I286_IP); | } |
| file_write(fh, buf, strlen(buf)); | #endif |
| } | #if 0 |
| } | if ((tr & 2) && (mem[0x0471e] == '\\')) { |
| i286_step(); | TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); |
| TRACEOUT(("0471:000e %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | |
| mem[0x0471e+0], mem[0x0471e+1], mem[0x0471e+2], mem[0x0471e+3], | |
| mem[0x0471e+4], mem[0x0471e+5], mem[0x0471e+6], mem[0x0471e+7])); | |
| tr -= 2; | |
| } | |
| // DOS6 | |
| if (CPU_CS == 0xffd0) { | |
| if (CPU_IP == 0xc4c2) { | |
| TRACEOUT(("DS:DX = %.4x:%.4x / CX = %.4x", CPU_DS, CPU_DX, CPU_CX)); | |
| } | |
| else if (CPU_IP == 0xc21d) { | |
| TRACEOUT(("-> DS:BX = %.4x:%.4x", CPU_DS, CPU_BX)); | |
| } | |
| } | |
| #endif | |
| #if 0 | |
| if ((CPU_CS == 0x0620) || (CPU_CS == 0x08a0)) { | |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | |
| } | |
| #endif | |
| i286x_step(); | |
| // i286c_step(); | |
| } | } |
| #endif | #endif |
| nevent_progress(); | nevent_progress(); |
| } | } |
| artic_callback(); // ver0.28 | artic_callback(); |
| mpu98ii_callback(); | mpu98ii_callback(); |
| diskdrv_callback(); | diskdrv_callback(); |
| calendar_inc(); | calendar_inc(); |
| S98_sync(); | |
| sound_sync(); // happy! | sound_sync(); // happy! |
| if (hardwarereset) { | |
| hardwarereset = FALSE; | |
| pccore_cfgupdate(); | |
| pccore_reset(); | |
| } | |
| #if defined(TRACE) | |
| execcnt++; | |
| if (execcnt >= 60) { | |
| // TRACEOUT(("resetcnt = %d / pic %d", resetcnt, piccnt)); | |
| execcnt = 0; | |
| resetcnt = 0; | |
| piccnt = 0; | |
| } | |
| #endif | |
| } | } |