|
|
| version 1.52, 2004/01/25 05:41:28 | version 1.58, 2004/01/29 23:42:02 |
|---|---|
| Line 58 | Line 58 |
| PCCORE pccore = { PCBASECLOCK25, 4, | PCCORE pccore = { PCBASECLOCK25, 4, |
| 0, PCMODEL_VX, 0, 0, | 0, PCMODEL_VX, 0, 0, |
| 0, {0, 0, 0}, | |
| 0, 0, | 0, 0, |
| 4 * PCBASECLOCK25, | 4 * PCBASECLOCK25, |
| 4 * PCBASECLOCK25 * 50 / 3104, | 4 * PCBASECLOCK25 * 50 / 3104, |
| Line 140 static void pccore_set(void) { | Line 141 static void pccore_set(void) { |
| UINT8 model; | UINT8 model; |
| UINT32 multiple; | UINT32 multiple; |
| UINT8 extsize; | |
| ZeroMemory(&pccore, sizeof(pccore)); | ZeroMemory(&pccore, sizeof(pccore)); |
| model = PCMODEL_VX; | model = PCMODEL_VX; |
| Line 176 static void pccore_set(void) { | Line 178 static void pccore_set(void) { |
| pccore.midiclock = pccore.realclock / 3125; | pccore.midiclock = pccore.realclock / 3125; |
| // 拡張メモリ | // 拡張メモリ |
| extsize = 0; | |
| if (!(np2cfg.dipsw[2] & 0x80)) { | if (!(np2cfg.dipsw[2] & 0x80)) { |
| pccore.extmem = np2cfg.EXTMEM; | extsize = min(np2cfg.EXTMEM, 13); |
| } | } |
| pccore.extmem = extsize; | |
| // HDDの接続 (I/Oの使用状態が変わるので.. | // HDDの接続 (I/Oの使用状態が変わるので.. |
| if (np2cfg.dipsw[1] & 0x20) { | if (np2cfg.dipsw[1] & 0x20) { |
| pccore.hddif |= PCHDD_IDE; | pccore.hddif |= PCHDD_IDE; |
| } | } |
| pccore.hddif |= PCHDD_SCSI; | |
| // サウンドボードの接続 | // サウンドボードの接続 |
| pccore.sound = np2cfg.SOUND_SW; | pccore.sound = np2cfg.SOUND_SW; |
| Line 348 void pccore_reset(void) { | Line 351 void pccore_reset(void) { |
| CPU_RAM_D000 = 0xffff; | CPU_RAM_D000 = 0xffff; |
| } | } |
| // HDDセット | |
| sxsi_open(); | |
| #if defined(SUPPORT_SASI) | |
| if (sxsi_issasi()) { | |
| pccore.hddif &= ~PCHDD_IDE; | |
| pccore.hddif |= PCHDD_SASI; | |
| TRACEOUT(("supported SASI")); | |
| } | |
| #endif | |
| #if defined(SUPPORT_SCSI) | |
| if (sxsi_isscsi()) { | |
| pccore.hddif |= PCHDD_SCSI; | |
| TRACEOUT(("supported SCSI")); | |
| } | |
| #endif | |
| sound_changeclock(); | sound_changeclock(); |
| beep_changeclock(); | beep_changeclock(); |
| sound_reset(); | sound_reset(); |
| Line 375 void pccore_reset(void) { | Line 394 void pccore_reset(void) { |
| pal_change(1); | pal_change(1); |
| bios_init(); | bios_init(); |
| sxsi_open(); | |
| if (np2cfg.ITF_WORK) { | if (np2cfg.ITF_WORK) { |
| CS_BASE = 0xf0000; | CS_BASE = 0xf0000; |
| Line 664 void pccore_exec(BOOL draw) { | Line 682 void pccore_exec(BOOL draw) { |
| treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; |
| trpos++; | trpos++; |
| #endif | #endif |
| #if 0 | #if 1 |
| if (tr) { | if ((CPU_CS == 0xf800) && (CPU_IP == 0x0B5B)) { |
| if ((CPU_CS == 0xf760) || (CPU_CS == 0xf990)) { | TRACEOUT(("%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", |
| TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); | mem[0x9000], mem[0x9001], |
| } | mem[0x9002], mem[0x9003], |
| mem[0x9004], mem[0x9005], | |
| mem[0x9006], mem[0x9007], | |
| mem[0x9008], mem[0x9009])); | |
| } | |
| if ((CPU_CS == 0xf800) && (CPU_IP == 0x15FF)) { | |
| TRACEOUT(("DX = %.4x / DS:DI = %.4x:%.4x [%.2x]", | |
| CPU_DX, CPU_DS, CPU_DI, mem[0xa3fe0])); | |
| } | } |
| #endif | #endif |
| #if 0 | #if 0 |