| version 1.46, 2004/01/22 08:40:30 | version 1.74, 2004/02/21 00:25:33 | 
| Line 5 | Line 5 | 
 | #include        "sysmng.h" | #include        "sysmng.h" | 
 | #include        "timemng.h" | #include        "timemng.h" | 
 | #include        "cpucore.h" | #include        "cpucore.h" | 
 | #include        "np2ver.h" |  | 
 | #include        "pccore.h" | #include        "pccore.h" | 
 | #include        "iocore.h" | #include        "iocore.h" | 
 |  | #include        "gdc_sub.h" | 
 | #include        "cbuscore.h" | #include        "cbuscore.h" | 
 | #include        "pc9861k.h" | #include        "pc9861k.h" | 
 | #include        "mpu98ii.h" | #include        "mpu98ii.h" | 
 |  | #include        "amd98.h" | 
 | #include        "bios.h" | #include        "bios.h" | 
 | #include        "biosmem.h" | #include        "biosmem.h" | 
 | #include        "vram.h" | #include        "vram.h" | 
| Line 29 | Line 30 | 
 | #include        "fddfile.h" | #include        "fddfile.h" | 
 | #include        "fdd_mtr.h" | #include        "fdd_mtr.h" | 
 | #include        "sxsi.h" | #include        "sxsi.h" | 
 | #include        "calendar.h" |  | 
 | #include        "timing.h" |  | 
 | #include        "debugsub.h" |  | 
 | #if defined(SUPPORT_HOSTDRV) | #if defined(SUPPORT_HOSTDRV) | 
 | #include        "hostdrv.h" | #include        "hostdrv.h" | 
 | #endif | #endif | 
 |  | #include        "np2ver.h" | 
 |  | #include        "calendar.h" | 
 |  | #include        "timing.h" | 
 |  | #include        "keystat.h" | 
 |  | #include        "debugsub.h" | 
 |  |  | 
 |  |  | 
 | const char      np2version[] = NP2VER_CORE; | const char      np2version[] = NP2VER_CORE; | 
| Line 42 | Line 45 | 
 | NP2CFG  np2cfg = { | NP2CFG  np2cfg = { | 
 | 0, 1, 0, 32, 0, 0, 0x40, | 0, 1, 0, 32, 0, 0, 0x40, | 
 | 0, 0, 0, 0, | 0, 0, 0, 0, | 
| {0x3e, 0x63, 0x7a}, 0, | {0x3e, 0x73, 0x7b}, 0, | 
 | 0, 0, {1, 1, 6, 1, 8, 1}, | 0, 0, {1, 1, 6, 1, 8, 1}, | 
 |  | {{0, {0, }}, {0, {0, }}}, | 
 |  |  | 
 | "VX", PCBASECLOCK25, 4, | "VX", PCBASECLOCK25, 4, | 
 | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}, | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}, | 
| Line 54 | Line 58 | 
 | 1, 0x82, | 1, 0x82, | 
 | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f}, | 
 | 3, 1, 80, 0, 0, | 3, 1, 80, 0, 0, | 
| {"", ""}, {"", "", "", ""}, "", "", ""}; | {"", ""}, | 
|  | #if defined(SUPPORT_SCSI) | 
|  | {"", "", "", ""}, | 
|  | #endif | 
|  | "", "", ""}; | 
 |  |  | 
 | PCCORE  pccore = {      PCBASECLOCK25, 4, | PCCORE  pccore = {      PCBASECLOCK25, 4, | 
| 0, PCMODEL_VX, 0, 0, | 0, PCMODEL_VX, 0, 0, {0x3e, 0x73, 0x7b}, 0, | 
 | 0, 0, | 0, 0, | 
| 4 * PCBASECLOCK25, | 4 * PCBASECLOCK25}; | 
| 4 * PCBASECLOCK25 * 50 / 3104, |  | 
| 4 * PCBASECLOCK25 * 5 / 3104, |  | 
| 4 * PCBASECLOCK25 / 1920, |  | 
| 4 * PCBASECLOCK25 / 3125, |  | 
| 100, 20}; |  | 
 |  |  | 
 | // on=0, off=1 |  | 
 | //      BYTE    dip_default[3] = {0x3e, 0x63, 0x7a}; |  | 
 | static const BYTE msw_default[8] = | static const BYTE msw_default[8] = | 
 | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}; | {0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e}; | 
 |  |  | 
| Line 76  static const BYTE msw_default[8] = | Line 77  static const BYTE msw_default[8] = | 
 | int             soundrenewal = 0; | int             soundrenewal = 0; | 
 | BOOL    drawframe; | BOOL    drawframe; | 
 | UINT    drawcount = 0; | UINT    drawcount = 0; | 
 |  | BOOL    hardwarereset = FALSE; | 
 |  |  | 
 |  |  | 
 | // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- | 
| Line 98  const char *p; | Line 100  const char *p; | 
 |  |  | 
 | // ---- | // ---- | 
 |  |  | 
 | static void setvsyncclock(void) { |  | 
 |  |  | 
 | UINT    vfp; |  | 
 | UINT    vbp; |  | 
 | UINT    lf; |  | 
 | UINT    disp; |  | 
 | UINT    vs; |  | 
 | UINT    maxy; |  | 
 | UINT    cnt; |  | 
 |  |  | 
 | vfp = gdc.m.para[GDC_SYNC + 5] & 0x3f; |  | 
 | if (!vfp) { |  | 
 | vfp = 1; |  | 
 | } |  | 
 | vbp = gdc.m.para[GDC_SYNC + 7] >> 2; |  | 
 | if (!vbp) { |  | 
 | vbp = 1; |  | 
 | } |  | 
 | lf = LOADINTELWORD(gdc.m.para + GDC_SYNC + 6); |  | 
 | lf &= 0x3ff; |  | 
 | if (!lf) { |  | 
 | lf = 1024; |  | 
 | } |  | 
 | disp = vfp + vbp + lf; |  | 
 | vs = LOADINTELWORD(gdc.m.para + GDC_SYNC + 4); |  | 
 | vs = (vs >> 5) & 0x1f; |  | 
 | if (!vs) { |  | 
 | vs = 1; |  | 
 | } |  | 
 | maxy = disp + vs; |  | 
 | cnt = (pccore.realclock * 5) / 282; |  | 
 | pccore.raster = cnt / maxy; |  | 
 | pccore.hsync = (pccore.raster * 4) / 5; |  | 
 | pccore.dispclock = pccore.raster * disp; |  | 
 | pccore.vsyncclock = cnt - pccore.dispclock; |  | 
 | } |  | 
 |  |  | 
 | static void pccore_set(void) { | static void pccore_set(void) { | 
 |  |  | 
 | UINT8   model; | UINT8   model; | 
 | UINT32  multiple; | UINT32  multiple; | 
 |  | UINT8   extsize; | 
 |  |  | 
 | ZeroMemory(&pccore, sizeof(pccore)); | ZeroMemory(&pccore, sizeof(pccore)); | 
 | model = PCMODEL_VX; | model = PCMODEL_VX; | 
| Line 156  static void pccore_set(void) { | Line 122  static void pccore_set(void) { | 
 | } | } | 
 | else { | else { | 
 | pccore.baseclock = PCBASECLOCK20;                       // 2.0MHz | pccore.baseclock = PCBASECLOCK20;                       // 2.0MHz | 
| pccore.cpumode = CPUMODE_8MHz; | pccore.cpumode = CPUMODE_8MHZ; | 
 | } | } | 
 | multiple = np2cfg.multiple; | multiple = np2cfg.multiple; | 
 | if (multiple == 0) { | if (multiple == 0) { | 
| Line 167  static void pccore_set(void) { | Line 133  static void pccore_set(void) { | 
 | } | } | 
 | pccore.multiple = multiple; | pccore.multiple = multiple; | 
 | pccore.realclock = pccore.baseclock * multiple; | pccore.realclock = pccore.baseclock * multiple; | 
| pccore.raster = pccore.realclock / 24816; | #if 0 | 
| pccore.hsync = (pccore.raster * 4) / 5; | keybrd.xferclock = pccore.realclock / 1920; | 
| pccore.dispclock = pccore.realclock * 50 / 3102; | gdc.rasterclock = pccore.realclock / 24816; | 
| pccore.vsyncclock = pccore.realclock * 5 / 3102; | gdc.hsyncclock = (gdc.rasterclock * 4) / 5; | 
| pccore.keyboardclock = pccore.realclock / 1920; | gdc.dispclock = pccore.realclock * 50 / 3102; | 
| pccore.midiclock = pccore.realclock / 3125; | gdc.vsyncclock = pccore.realclock * 5 / 3102; | 
|  | #endif | 
| // 拡張メモリ |  | 
| pccore.extmem = 0; |  | 
|  |  | 
 | // HDDの接続 (I/Oの使用状態が変わるので.. | // HDDの接続 (I/Oの使用状態が変わるので.. | 
| //      if (np2cfg.dipsw[1] & 0x20) { | if (np2cfg.dipsw[1] & 0x20) { | 
 | pccore.hddif |= PCHDD_IDE; | pccore.hddif |= PCHDD_IDE; | 
| //      } | } | 
| pccore.hddif |= PCHDD_SCSI; |  | 
|  | // 拡張メモリ | 
|  | extsize = 0; | 
|  | if (!(np2cfg.dipsw[2] & 0x80)) { | 
|  | extsize = min(np2cfg.EXTMEM, 13); | 
|  | } | 
|  | pccore.extmem = extsize; | 
|  | CopyMemory(pccore.dipsw, np2cfg.dipsw, 3); | 
 |  |  | 
 | // サウンドボードの接続 | // サウンドボードの接続 | 
 | pccore.sound = np2cfg.SOUND_SW; | pccore.sound = np2cfg.SOUND_SW; | 
| Line 208  static void sound_init(void) { | Line 178  static void sound_init(void) { | 
 | rate = 0; | rate = 0; | 
 | } | } | 
 | sound_create(rate, np2cfg.delayms); | sound_create(rate, np2cfg.delayms); | 
| #if defined(SUPPORT_WAVEMIX) | fddmtrsnd_initialize(rate); | 
| wavemix_initialize(rate); |  | 
| #endif |  | 
 | beep_initialize(rate); | beep_initialize(rate); | 
 | beep_setvol(np2cfg.BEEP_VOL); | beep_setvol(np2cfg.BEEP_VOL); | 
 | tms3631_initialize(rate); | tms3631_initialize(rate); | 
| Line 226  static void sound_init(void) { | Line 194  static void sound_init(void) { | 
 | pcm86gen_initialize(rate); | pcm86gen_initialize(rate); | 
 | pcm86gen_setvol(np2cfg.vol_pcm); | pcm86gen_setvol(np2cfg.vol_pcm); | 
 | cs4231_initialize(rate); | cs4231_initialize(rate); | 
 |  | amd98_initialize(rate); | 
 | } | } | 
 |  |  | 
 | static void sound_term(void) { | static void sound_term(void) { | 
 |  |  | 
 | soundmng_stop(); | soundmng_stop(); | 
| #if defined(SUPPORT_WAVEMIX) | amd98_deinitialize(); | 
| wavemix_deinitialize(); |  | 
| #endif |  | 
 | rhythm_deinitialize(); | rhythm_deinitialize(); | 
 |  | fddmtrsnd_deinitialize(); | 
 | sound_destroy(); | sound_destroy(); | 
 | } | } | 
 |  |  | 
| Line 245  void pccore_init(void) { | Line 213  void pccore_init(void) { | 
 | pal_initlcdtable(); | pal_initlcdtable(); | 
 | pal_makelcdpal(); | pal_makelcdpal(); | 
 | pal_makeskiptable(); | pal_makeskiptable(); | 
| dispsync_init(); | dispsync_initialize(); | 
 | sxsi_initialize(); | sxsi_initialize(); | 
 |  |  | 
| font_init(); | font_initialize(); | 
 | font_load(np2cfg.fontfile, TRUE); | font_load(np2cfg.fontfile, TRUE); | 
| maketext_init(); | maketext_initialize(); | 
| makegrph_init(); | makegrph_initialize(); | 
| gdcsub_init(); | gdcsub_initialize(); | 
| fddfile_init(); | fddfile_initialize(); | 
 |  |  | 
 | sound_init(); | sound_init(); | 
 |  |  | 
 | mpu98ii_construct(); |  | 
 | rs232c_construct(); | rs232c_construct(); | 
| pc9861k_construct(); | mpu98ii_construct(); | 
|  | pc9861k_initialize(); | 
 |  |  | 
 | iocore_create(); | iocore_create(); | 
 |  |  | 
| Line 281  void pccore_term(void) { | Line 249  void pccore_term(void) { | 
 | fdd_eject(2); | fdd_eject(2); | 
 | fdd_eject(3); | fdd_eject(3); | 
 |  |  | 
 | extmemmng_clear(); |  | 
 |  |  | 
 | iocore_destroy(); | iocore_destroy(); | 
 |  |  | 
| pc9861k_destruct(); | pc9861k_deinitialize(); | 
| rs232c_destruct(); |  | 
 | mpu98ii_destruct(); | mpu98ii_destruct(); | 
 |  | rs232c_destruct(); | 
 |  |  | 
 | sxsi_trash(); | sxsi_trash(); | 
 |  |  | 
 |  | CPU_DEINITIALIZE(); | 
 | } | } | 
 |  |  | 
 |  |  | 
| Line 314  void pccore_reset(void) { | Line 282  void pccore_reset(void) { | 
 |  |  | 
 | int             i; | int             i; | 
 |  |  | 
| ZeroMemory(mem, 0x10fff0);                                                                      // ver0.28 | soundmng_stop(); | 
|  | if (soundrenewal) { | 
|  | soundrenewal = 0; | 
|  | sound_term(); | 
|  | sound_init(); | 
|  | } | 
|  |  | 
|  | ZeroMemory(mem, 0x110000); | 
 | ZeroMemory(mem + VRAM1_B, 0x18000); | ZeroMemory(mem + VRAM1_B, 0x18000); | 
 | ZeroMemory(mem + VRAM1_E, 0x08000); | ZeroMemory(mem + VRAM1_E, 0x08000); | 
 | ZeroMemory(mem + FONT_ADRS, 0x08000); | ZeroMemory(mem + FONT_ADRS, 0x08000); | 
 |  |  | 
 | CPU_RESET(); |  | 
 | CPU_TYPE = 0; |  | 
 | if (np2cfg.dipsw[2] & 0x80) { |  | 
 | CPU_TYPE = CPUTYPE_V30; |  | 
 | } |  | 
 |  |  | 
 | //メモリスイッチ | //メモリスイッチ | 
 | for (i=0; i<8; i++) { | for (i=0; i<8; i++) { | 
 | mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; | 
 | } | } | 
 |  |  | 
| fddfile_reset2dmode(); | pccore_set(); | 
| bios0x18_16(0x20, 0xe1); | nevent_allreset(); | 
 |  |  | 
| soundmng_stop(); | CPU_RESET(); | 
| if (soundrenewal) { | CPU_SETEXTSIZE((UINT32)pccore.extmem); | 
| soundrenewal = 0; |  | 
| sound_term(); | CPU_TYPE = 0; | 
| sound_init(); | if (np2cfg.dipsw[2] & 0x80) { | 
|  | CPU_TYPE = CPUTYPE_V30; | 
|  | } | 
|  | if (pccore.model & PCMODEL_EPSON) {                     // RAM ctrl | 
|  | CPU_RAM_D000 = 0xffff; | 
 | } | } | 
 |  |  | 
| pccore_set(); | // HDDセット | 
|  | sxsi_open(); | 
|  | #if defined(SUPPORT_SASI) | 
|  | if (sxsi_issasi()) { | 
|  | pccore.hddif &= ~PCHDD_IDE; | 
|  | pccore.hddif |= PCHDD_SASI; | 
|  | TRACEOUT(("supported SASI")); | 
|  | } | 
|  | #endif | 
|  | #if defined(SUPPORT_SCSI) | 
|  | if (sxsi_isscsi()) { | 
|  | pccore.hddif |= PCHDD_SCSI; | 
|  | TRACEOUT(("supported SCSI")); | 
|  | } | 
|  | #endif | 
 |  |  | 
 | sound_changeclock(); | sound_changeclock(); | 
 | beep_changeclock(); | beep_changeclock(); | 
 | nevent_init(); |  | 
 |  |  | 
 | sound_reset(); | sound_reset(); | 
| #if defined(SUPPORT_WAVEMIX) | fddmtrsnd_bind(); | 
| wavemix_bind(); |  | 
| #endif |  | 
 |  |  | 
| if (pccore.model & PCMODEL_EPSON) {                     // RAM ctrl | fddfile_reset2dmode(); | 
| CPU_RAM_D000 = 0xffff; | bios0x18_16(0x20, 0xe1); | 
| } |  | 
 |  |  | 
 | iocore_reset();                                                         // サウンドでpicを呼ぶので… | iocore_reset();                                                         // サウンドでpicを呼ぶので… | 
 | cbuscore_reset(); | cbuscore_reset(); | 
| fmboard_reset(np2cfg.SOUND_SW); | fmboard_reset(pccore.sound); | 
 |  |  | 
 | i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); | 
 | iocore_build(); | iocore_build(); | 
| Line 365  void pccore_reset(void) { | Line 347  void pccore_reset(void) { | 
 | cbuscore_bind(); | cbuscore_bind(); | 
 | fmboard_bind(); | fmboard_bind(); | 
 |  |  | 
| timing_reset(); | fddmtr_initialize(); | 
| fddmtr_init(); | calendar_initialize(); | 
| calendar_init(); | vram_initialize(); | 
| vram_init(); |  | 
 |  |  | 
 | pal_change(1); | pal_change(1); | 
 |  |  | 
| bios_init(); | bios_initialize(); | 
| sxsi_open(); |  | 
 |  |  | 
 | if (np2cfg.ITF_WORK) { | if (np2cfg.ITF_WORK) { | 
 | CS_BASE = 0xf0000; | CS_BASE = 0xf0000; | 
| Line 391  void pccore_reset(void) { | Line 371  void pccore_reset(void) { | 
 | CPU_CLEARPREFETCH(); | CPU_CLEARPREFETCH(); | 
 | sysmng_cpureset(); | sysmng_cpureset(); | 
 |  |  | 
 | soundmng_play(); |  | 
 |  |  | 
 | #if defined(SUPPORT_HOSTDRV) | #if defined(SUPPORT_HOSTDRV) | 
 | hostdrv_reset(); | hostdrv_reset(); | 
 | #endif | #endif | 
 |  |  | 
 |  | timing_reset(); | 
 |  | soundmng_play(); | 
 | } | } | 
 |  |  | 
 | static void drawscreen(void) { | static void drawscreen(void) { | 
| Line 414  static void drawscreen(void) { | Line 395  static void drawscreen(void) { | 
 | tramflag.renewal |= 1; | tramflag.renewal |= 1; | 
 | } | } | 
 |  |  | 
| if ((gdcs.textdisp & GDCSCRN_EXT) ||                                            // ver0.28 | if (gdcs.textdisp & GDCSCRN_EXT) { | 
| (gdcs.grphdisp & GDCSCRN_EXT)) { | gdc_updateclock(); | 
| setvsyncclock(); |  | 
 | } | } | 
 |  |  | 
 | if (drawframe) { | if (drawframe) { | 
| if ((gdcs.textdisp & GDCSCRN_EXT) ||                                    // ver0.26 | if ((gdcs.textdisp & GDCSCRN_EXT) || | 
 | (gdcs.grphdisp & GDCSCRN_EXT)) { | (gdcs.grphdisp & GDCSCRN_EXT)) { | 
 | if (dispsync_renewalvertical()) { | if (dispsync_renewalvertical()) { | 
 | gdcs.textdisp |= GDCSCRN_ALLDRAW2; | gdcs.textdisp |= GDCSCRN_ALLDRAW2; | 
 | gdcs.grphdisp |= GDCSCRN_ALLDRAW2; | gdcs.grphdisp |= GDCSCRN_ALLDRAW2; | 
 | } | } | 
 | } | } | 
 | // ver0.28/pr4 |  | 
 | if (gdcs.textdisp & GDCSCRN_EXT) { | if (gdcs.textdisp & GDCSCRN_EXT) { | 
 | gdcs.textdisp &= ~GDCSCRN_EXT; | gdcs.textdisp &= ~GDCSCRN_EXT; | 
 | dispsync_renewalhorizontal(); | dispsync_renewalhorizontal(); | 
| Line 436  static void drawscreen(void) { | Line 415  static void drawscreen(void) { | 
 | screenupdate |= 2; | screenupdate |= 2; | 
 | } | } | 
 | } | } | 
| // ver0.28/pr4 | if (gdcs.palchange) { | 
| if (gdcs.palchange) {                                                                   // grphを先に |  | 
 | gdcs.palchange = 0; | gdcs.palchange = 0; | 
 | pal_change(0); | pal_change(0); | 
 | screenupdate |= 1; | screenupdate |= 1; | 
| Line 534  void screendisp(NEVENTITEM item) { | Line 512  void screendisp(NEVENTITEM item) { | 
 | gdc_work(GDCWORK_SLAVE); | gdc_work(GDCWORK_SLAVE); | 
 | gdc.vsync = 0; | gdc.vsync = 0; | 
 | screendispflag = 0; | screendispflag = 0; | 
| if (!np2cfg.DISPSYNC) {                                                                                 // ver0.29 | if (!np2cfg.DISPSYNC) { | 
 | drawscreen(); | drawscreen(); | 
 | } | } | 
 | pi = &pic.pi[0]; | pi = &pic.pi[0]; | 
| Line 556  void screenvsync(NEVENTITEM item) { | Line 534  void screenvsync(NEVENTITEM item) { | 
 | gdc.vsyncint = 0; | gdc.vsyncint = 0; | 
 | pic_setirq(2); | pic_setirq(2); | 
 | } | } | 
| nevent_set(NEVENT_FLAMES, pccore.vsyncclock, screendisp, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, gdc.vsyncclock, screendisp, NEVENT_RELATIVE); | 
 |  |  | 
 | // drawscreenで pccore.vsyncclockが変更される可能性があります | // drawscreenで pccore.vsyncclockが変更される可能性があります | 
| if (np2cfg.DISPSYNC) {                                                                                  // ver0.29 | if (np2cfg.DISPSYNC) { | 
 | drawscreen(); | drawscreen(); | 
 | } | } | 
 | (void)item; | (void)item; | 
| Line 568  void screenvsync(NEVENTITEM item) { | Line 546  void screenvsync(NEVENTITEM item) { | 
 |  |  | 
 | // --------------------------------------------------------------------------- | // --------------------------------------------------------------------------- | 
 |  |  | 
| // #define      IPTRACE                 (1 << 16) | #define IPTRACE                 (1 << 12) | 
 |  |  | 
| #if IPTRACE | #if defined(TRACE) && IPTRACE | 
| static UINT             trpos; | static UINT             trpos = 0; | 
 | static UINT32   treip[IPTRACE]; | static UINT32   treip[IPTRACE]; | 
 |  |  | 
 | void iptrace_out(void) { | void iptrace_out(void) { | 
| Line 605  static int resetcnt = 0; | Line 583  static int resetcnt = 0; | 
 | static int execcnt = 0; | static int execcnt = 0; | 
 | int piccnt = 0; | int piccnt = 0; | 
 | int tr = 0; | int tr = 0; | 
 |  | UINT    cflg; | 
 | #endif | #endif | 
 |  |  | 
 | UINT    cflg; |  | 
 |  |  | 
 | void pccore_exec(BOOL draw) { | void pccore_exec(BOOL draw) { | 
 |  |  | 
 | drawframe = draw; | drawframe = draw; | 
| keyext_flash(); | keystat_sync(); | 
 | soundmng_sync(); | soundmng_sync(); | 
 | mouseif_sync(); | mouseif_sync(); | 
 | pal_eventclear(); | pal_eventclear(); | 
| Line 622  void pccore_exec(BOOL draw) { | Line 600  void pccore_exec(BOOL draw) { | 
 | MEMWAIT_TRAM = np2cfg.wait[0]; | MEMWAIT_TRAM = np2cfg.wait[0]; | 
 | MEMWAIT_VRAM = np2cfg.wait[2]; | MEMWAIT_VRAM = np2cfg.wait[2]; | 
 | MEMWAIT_GRCG = np2cfg.wait[4]; | MEMWAIT_GRCG = np2cfg.wait[4]; | 
| nevent_set(NEVENT_FLAMES, pccore.dispclock, screenvsync, NEVENT_RELATIVE); | nevent_set(NEVENT_FLAMES, gdc.dispclock, screenvsync, NEVENT_RELATIVE); | 
 |  |  | 
 | //      nevent_get1stevent(); | //      nevent_get1stevent(); | 
 |  |  | 
| Line 661  void pccore_exec(BOOL draw) { | Line 639  void pccore_exec(BOOL draw) { | 
 | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; | 
 | trpos++; | trpos++; | 
 | #endif | #endif | 
 | if (tr) { |  | 
 | TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); |  | 
 | } |  | 
 | #if 0 | #if 0 | 
| if ((tr & 2) && (mem[0x0471e] == '\\')) { | if ((CPU_CS == 0xf800) && (CPU_IP == 0x0B5B)) { | 
| TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); | TRACEOUT(("%.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | 
| TRACEOUT(("0471:000e %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x", | mem[0x9000], mem[0x9001], | 
| mem[0x0471e+0], mem[0x0471e+1], mem[0x0471e+2], mem[0x0471e+3], | mem[0x9002], mem[0x9003], | 
| mem[0x0471e+4], mem[0x0471e+5], mem[0x0471e+6], mem[0x0471e+7])); | mem[0x9004], mem[0x9005], | 
| tr -= 2; | mem[0x9006], mem[0x9007], | 
| } | mem[0x9008], mem[0x9009])); | 
| // DOS6 | } | 
| if (CPU_CS == 0xffd0) { | if ((CPU_CS == 0xf800) && (CPU_IP == 0x15FF)) { | 
| if (CPU_IP == 0xc4c2) { | TRACEOUT(("DX = %.4x / DS:DI = %.4x:%.4x [%.2x]", | 
| TRACEOUT(("DS:DX = %.4x:%.4x / CX = %.4x", CPU_DS, CPU_DX, CPU_CX)); | CPU_DX, CPU_DS, CPU_DI, mem[0xa3fe0])); | 
| } | } | 
| else if (CPU_IP == 0xc21d) { | #endif | 
| TRACEOUT(("-> DS:BX = %.4x:%.4x", CPU_DS, CPU_BX)); | //                      if ((CPU_CS == 0x2516) && (CPU_IP == 0x97B0)) { | 
| } | //                              TRACEOUT(("DS = %.4x", CPU_DS)); | 
| } | //                      } | 
| #endif |  | 
 | //                      i286x_step(); | //                      i286x_step(); | 
 | i286c_step(); | i286c_step(); | 
 | } | } | 
| Line 695  void pccore_exec(BOOL draw) { | Line 669  void pccore_exec(BOOL draw) { | 
 | S98_sync(); | S98_sync(); | 
 | sound_sync();                                                                                                   // happy! | sound_sync();                                                                                                   // happy! | 
 |  |  | 
 |  | if (hardwarereset) { | 
 |  | hardwarereset = FALSE; | 
 |  | pccore_cfgupdate(); | 
 |  | pccore_reset(); | 
 |  | } | 
 |  |  | 
 | #if defined(TRACE) | #if defined(TRACE) | 
 | execcnt++; | execcnt++; | 
 | if (execcnt >= 60) { | if (execcnt >= 60) { |