--- np2/pccore.c	2003/11/13 15:33:05	1.16
+++ np2/pccore.c	2003/11/21 06:51:10	1.19
@@ -11,6 +11,7 @@
 #include	"pc9861k.h"
 #include	"mpu98ii.h"
 #include	"bios.h"
+#include	"biosmem.h"
 #include	"vram.h"
 #include	"scrndraw.h"
 #include	"dispsync.h"
@@ -34,38 +35,38 @@
 
 	const char	np2version[] = NP2VER_CORE;
 
-	NP2CFG		np2cfg = {
-				PCBASECLOCK25, 4, 0,
-				{0x3e, 0x63, 0x7a},
-				{0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6E},
-				{0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c},
-				{1, 1, 6, 1, 8, 1},
-				0, 4, 32, 22050, 800, 0, 1, 1, 0,
-				0, 0,
-				0, {0, 0, 0}, 0xd1, 0x7f, 0xd1, 0, 0, 1, 0x82,		// ver0.30
-				1, 80, 3, 1, 1, 0, 0x000000, 0xffffff,
-				0, 0, 0, 0x40, 0,
-				64, 64, 64, 64, 64,
+	NP2CFG	np2cfg = {
+				0, 1, 0, 32, 0, 0, 0x40,
+				0, 0, 0, 0,
+				{0x3e, 0x63, 0x7a}, 0,
+				0, 0, {1, 1, 6, 1, 8, 1},
+
+				"VX", PCBASECLOCK25, 4,
+				{0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e},
+				1, 1, 2, 1, 0x000000, 0xffffff,
+				22050, 800, 4, 0,
+				{0, 0, 0}, 0xd1, 0x7f, 0xd1, 0, 0, 1,
+				3, {0x0c, 0x0c, 0x08, 0x06, 0x03, 0x0c}, 64, 64, 64, 64, 64,
+				1, 0x82,
 				0, {0x17, 0x04, 0x1f}, {0x0c, 0x0c, 0x02, 0x10, 0x3f, 0x3f},
-				2, 1, 0, 0,
+				1, 80, 0,
 				{"", ""}, ""};
 
 	PCCORE	pc = {	PCBASECLOCK25,
-							4,
-							4 * PCBASECLOCK25,
-							4 * PCBASECLOCK25 * 50 / 3104,
-							4 * PCBASECLOCK25 * 5 / 3104,
-							4 * PCBASECLOCK25 / 120,
-							4 * PCBASECLOCK25 / 1920,
-							4 * PCBASECLOCK25 / 3125,
-							(4 * PCBASECLOCK25 / 56400),
-							100, 20,
-							0};
+					4,
+					4 * PCBASECLOCK25,
+					4 * PCBASECLOCK25 * 50 / 3104,
+					4 * PCBASECLOCK25 * 5 / 3104,
+					4 * PCBASECLOCK25 / 120,
+					4 * PCBASECLOCK25 / 1920,
+					4 * PCBASECLOCK25 / 3125,
+					4 * PCBASECLOCK25 / 56400,
+					100, 20, 0, PCMODEL_VX};
 
-//									// on=0, off=1
+									// on=0, off=1
 //	BYTE	dip_default[3] = {0x3e, 0x63, 0x7a};
 static const BYTE msw_default[8] =
-							{0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6E};
+							{0x48, 0x05, 0x04, 0x00, 0x01, 0x00, 0x00, 0x6e};
 
 	BYTE	screenupdate = 3;
 	int		screendispflag = 1;
@@ -115,7 +116,9 @@ static void setvsyncclock(void) {
 	pc.vsyncclock = cnt - pc.dispclock;
 }
 
-static void setpcclock(UINT base, UINT multiple) {			// ver0.28
+static void setpcclock(UINT base, UINT multiple) {
+
+	pc.model = PCMODEL_VX;
 
 	if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) {
 		pc.baseclock = PCBASECLOCK25;			// 2.5MHz
@@ -211,7 +214,7 @@ void pccore_term(void) {
 	fdd_eject(2);
 	fdd_eject(3);
 
-	extmemmng_clear();												// ver0.28
+	extmemmng_clear();
 
 	iocore_destroy();
 
@@ -230,8 +233,8 @@ void pccore_cfgupdate(void) {
 
 	renewal = FALSE;
 	for (i=0; i<8; i++) {
-		if (np2cfg.memsw[i] != mem[0xa3fe2 + i*4]) {
-			np2cfg.memsw[i] = mem[0xa3fe2 + i*4];
+		if (np2cfg.memsw[i] != mem[MEMB_MSW + i*4]) {
+			np2cfg.memsw[i] = mem[MEMB_MSW + i*4];
 			renewal = TRUE;
 		}
 	}
@@ -527,6 +530,26 @@ void pccore_exec(BOOL draw) {
 		}
 #else
 		while(I286_REMCLOCK > 0) {
+#if 0
+			TRACEOUT(("%.4x:%.4x", I286_CS, I286_IP));
+#elif 1
+			if ((I286_CS == 0x1c29) && (I286_IP == 0x01E9)) {
+				if (I286_BX) {
+					TRACEOUT(("set %.4x", I286_BX));
+				}
+			}
+			if ((I286_CS == 0x4159) && (I286_IP == 0x02d6)) {
+				if (I286_AX) {
+					TRACEOUT(("get %d", (short)I286_AX));
+				}
+			}
+#else
+			if (I286_CS == 0x4159) {
+				if ((I286_IP >= 0x02d1) && (I286_IP < 0x02e3)) {
+					TRACEOUT(("%s", debugsub_regs()));
+				}
+			}
+#endif
 			i286_step();
 		}
 #endif