--- np2/pccore.c 2004/01/22 01:10:03 1.45 +++ np2/pccore.c 2004/01/25 05:41:28 1.52 @@ -5,7 +5,6 @@ #include "sysmng.h" #include "timemng.h" #include "cpucore.h" -#include "np2ver.h" #include "pccore.h" #include "iocore.h" #include "cbuscore.h" @@ -29,12 +28,13 @@ #include "fddfile.h" #include "fdd_mtr.h" #include "sxsi.h" -#include "calendar.h" -#include "timing.h" -#include "debugsub.h" #if defined(SUPPORT_HOSTDRV) #include "hostdrv.h" #endif +#include "np2ver.h" +#include "calendar.h" +#include "timing.h" +#include "debugsub.h" const char np2version[] = NP2VER_CORE; @@ -76,6 +76,7 @@ static const BYTE msw_default[8] = int soundrenewal = 0; BOOL drawframe; UINT drawcount = 0; + BOOL hardwarereset = FALSE; // --------------------------------------------------------------------------- @@ -135,20 +136,22 @@ static void setvsyncclock(void) { pccore.vsyncclock = cnt - pccore.dispclock; } -static void setpcclock(const char *modelstr, UINT base, UINT multiple) { +static void pccore_set(void) { UINT8 model; + UINT32 multiple; + ZeroMemory(&pccore, sizeof(pccore)); model = PCMODEL_VX; - if (!milstr_cmp(modelstr, str_VM)) { + if (!milstr_cmp(np2cfg.model, str_VM)) { model = PCMODEL_VM; } - else if (!milstr_cmp(modelstr, str_EPSON)) { + else if (!milstr_cmp(np2cfg.model, str_EPSON)) { model = PCMODEL_EPSON | PCMODEL_VM; } pccore.model = model; - if (base >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { + if (np2cfg.baseclock >= ((PCBASECLOCK25 + PCBASECLOCK20) / 2)) { pccore.baseclock = PCBASECLOCK25; // 2.5MHz pccore.cpumode = 0; } @@ -156,6 +159,7 @@ static void setpcclock(const char *model pccore.baseclock = PCBASECLOCK20; // 2.0MHz pccore.cpumode = CPUMODE_8MHz; } + multiple = np2cfg.multiple; if (multiple == 0) { multiple = 1; } @@ -170,6 +174,29 @@ static void setpcclock(const char *model pccore.vsyncclock = pccore.realclock * 5 / 3102; pccore.keyboardclock = pccore.realclock / 1920; pccore.midiclock = pccore.realclock / 3125; + + // 拡張メモリ + if (!(np2cfg.dipsw[2] & 0x80)) { + pccore.extmem = np2cfg.EXTMEM; + } + + // HDDの接続 (I/Oの使用状態が変わるので.. + if (np2cfg.dipsw[1] & 0x20) { + pccore.hddif |= PCHDD_IDE; + } + pccore.hddif |= PCHDD_SCSI; + + // サウンドボードの接続 + pccore.sound = np2cfg.SOUND_SW; + + // その他CBUSの接続 + pccore.device = 0; + if (np2cfg.pc9861enable) { + pccore.device |= PCCBUS_PC9861K; + } + if (np2cfg.mpuenable) { + pccore.device |= PCCBUS_MPU98; + } } @@ -257,8 +284,6 @@ void pccore_term(void) { fdd_eject(2); fdd_eject(3); - extmemmng_clear(); - iocore_destroy(); pc9861k_destruct(); @@ -266,6 +291,8 @@ void pccore_term(void) { mpu98ii_destruct(); sxsi_trash(); + + CPU_DEINITIALIZE(); } @@ -290,25 +317,6 @@ void pccore_reset(void) { int i; - ZeroMemory(mem, 0x10fff0); // ver0.28 - ZeroMemory(mem + VRAM1_B, 0x18000); - ZeroMemory(mem + VRAM1_E, 0x08000); - ZeroMemory(mem + FONT_ADRS, 0x08000); - - CPU_RESET(); - CPU_TYPE = 0; - if (np2cfg.dipsw[2] & 0x80) { - CPU_TYPE = CPUTYPE_V30; - } - - //メモリスイッチ - for (i=0; i<8; i++) { - mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; - } - - fddfile_reset2dmode(); - bios0x18_16(0x20, 0xe1); - soundmng_stop(); if (soundrenewal) { soundrenewal = 0; @@ -316,45 +324,43 @@ void pccore_reset(void) { sound_init(); } + ZeroMemory(mem, 0x110000); // ver0.28 + ZeroMemory(mem + VRAM1_B, 0x18000); + ZeroMemory(mem + VRAM1_E, 0x08000); + ZeroMemory(mem + FONT_ADRS, 0x08000); - // さて・・・? - setpcclock(np2cfg.model, np2cfg.baseclock, np2cfg.multiple); - - // 拡張メモリ - pccore.extmem = 0; + //メモリスイッチ + for (i=0; i<8; i++) { + mem[0xa3fe2 + i*4] = np2cfg.memsw[i]; + } - // HDDの接続 (I/Oの使用状態が変わるので.. - pccore.hddif = PCHDD_SCSI | PCHDD_IDE; + pccore_set(); + nevent_init(); - // サウンドボードの接続 - pccore.sound = np2cfg.SOUND_SW; + CPU_RESET(); + CPU_SETEXTSIZE((UINT32)pccore.extmem); - // その他CBUSの接続 - pccore.device = 0; - if (np2cfg.pc9861enable) { - pccore.device |= PCCBUS_PC9861K; + CPU_TYPE = 0; + if (np2cfg.dipsw[2] & 0x80) { + CPU_TYPE = CPUTYPE_V30; } - if (np2cfg.mpuenable) { - pccore.device |= PCCBUS_MPU98; + if (pccore.model & PCMODEL_EPSON) { // RAM ctrl + CPU_RAM_D000 = 0xffff; } - sound_changeclock(); beep_changeclock(); - nevent_init(); - sound_reset(); #if defined(SUPPORT_WAVEMIX) wavemix_bind(); #endif - if (pccore.model & PCMODEL_EPSON) { // RAM ctrl - CPU_RAM_D000 = 0xffff; - } + fddfile_reset2dmode(); + bios0x18_16(0x20, 0xe1); iocore_reset(); // サウンドでpicを呼ぶので… cbuscore_reset(); - fmboard_reset(np2cfg.SOUND_SW); + fmboard_reset(pccore.sound); i286_memorymap((pccore.model & PCMODEL_EPSON)?1:0); iocore_build(); @@ -362,7 +368,6 @@ void pccore_reset(void) { cbuscore_bind(); fmboard_bind(); - timing_reset(); fddmtr_init(); calendar_init(); vram_init(); @@ -388,11 +393,12 @@ void pccore_reset(void) { CPU_CLEARPREFETCH(); sysmng_cpureset(); - soundmng_play(); - #if defined(SUPPORT_HOSTDRV) hostdrv_reset(); #endif + + timing_reset(); + soundmng_play(); } static void drawscreen(void) { @@ -565,10 +571,10 @@ void screenvsync(NEVENTITEM item) { // --------------------------------------------------------------------------- -// #define IPTRACE (1 << 16) +// #define IPTRACE (1 << 12) -#if IPTRACE -static UINT trpos; +#if defined(TRACE) && IPTRACE +static UINT trpos = 0; static UINT32 treip[IPTRACE]; void iptrace_out(void) { @@ -602,9 +608,9 @@ static int resetcnt = 0; static int execcnt = 0; int piccnt = 0; int tr = 0; +UINT cflg; #endif - UINT cflg; void pccore_exec(BOOL draw) { @@ -658,9 +664,13 @@ void pccore_exec(BOOL draw) { treip[trpos & (IPTRACE - 1)] = (CPU_CS << 16) + CPU_IP; trpos++; #endif +#if 0 if (tr) { - TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); + if ((CPU_CS == 0xf760) || (CPU_CS == 0xf990)) { + TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); + } } +#endif #if 0 if ((tr & 2) && (mem[0x0471e] == '\\')) { TRACEOUT(("DTA BREAK %.4x:%.4x", CPU_CS, CPU_IP)); @@ -679,8 +689,13 @@ void pccore_exec(BOOL draw) { } } #endif -// i286x_step(); - i286c_step(); +#if 0 + if ((CPU_CS == 0x0620) || (CPU_CS == 0x08a0)) { + TRACEOUT(("%.4x:%.4x", CPU_CS, CPU_IP)); + } +#endif + i286x_step(); +// i286c_step(); } #endif nevent_progress(); @@ -692,6 +707,12 @@ void pccore_exec(BOOL draw) { S98_sync(); sound_sync(); // happy! + if (hardwarereset) { + hardwarereset = FALSE; + pccore_cfgupdate(); + pccore_reset(); + } + #if defined(TRACE) execcnt++; if (execcnt >= 60) {