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version 1.5, 2003/12/01 10:45:46
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version 1.11, 2004/02/07 21:23:22
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Line 1
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Line 1
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| USE_EGCASM equ 1 |
USE_EGCASM equ 1 |
| USE_HIMEM equ 1 |
USE_HIMEM equ 0110000h |
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| EARG1 equ 4 |
EARG1 equ 4 |
| EARG2 equ (EARG1+4) |
EARG2 equ (EARG1+4) |
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Line 47 SCRN_BUFSIZE equ 04b000h
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Line 47 SCRN_BUFSIZE equ 04b000h
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| GDCCMD_MAX equ 32 |
GDCCMD_MAX equ 32 |
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| struc i286stat_t |
struc i286core_t |
| .reg resw 14 |
.reg resw 14 |
| .remainclock resd 1 |
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| .baseclock resd 1 |
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| .clock resd 1 |
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| .adrsmask resd 1 |
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| .es_base resd 1 |
.es_base resd 1 |
| .cs_base resd 1 |
.cs_base resd 1 |
| .ss_base resd 1 |
.ss_base resd 1 |
| .ds_base resd 1 |
.ds_base resd 1 |
| .ss_fix resd 1 |
.ss_fix resd 1 |
| .ds_fix resd 1 |
.ds_fix resd 1 |
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.adrsmask resd 1 |
| .prefix resw 1 |
.prefix resw 1 |
| .trap resb 1 |
.trap resb 1 |
| .cpu_type resb 1 |
.resetreq resb 1 |
| .pf_semaphore resd 1 |
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| .repbak resd 1 |
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| .inport resd 1 |
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| .prefetchque resd 1 |
.prefetchque resd 1 |
| .GDTR resb 6 |
.GDTR resb 6 |
| .IDTR resb 6 |
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| .MSW resw 1 |
.MSW resw 1 |
| .resetreq resb 1 |
.IDTR resb 6 |
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.LDTR resw 1 |
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.LDTRC resb 6 |
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.TR resw 1 |
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.TRC resb 6 |
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resb 2 |
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.cpu_type resb 1 |
| .itfbank resb 1 |
.itfbank resb 1 |
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.ram_d0 resw 1 |
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.remainclock resd 1 |
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.baseclock resd 1 |
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.clock resd 1 |
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.ext resd 1 |
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.extsize resd 1 |
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.ems resd 4 |
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.repbak resd 1 |
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.inport resd 1 |
| endstruc |
endstruc |
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| struc gdcd_t |
struc gdcd_t |
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Line 90 GDCCMD_MAX equ 32
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Line 100 GDCCMD_MAX equ 32
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| .s resb gdcd_t_size |
.s resb gdcd_t_size |
| .mode1 resb 1 |
.mode1 resb 1 |
| .mode2 resb 1 |
.mode2 resb 1 |
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.clock resb 1 |
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.crt15khz resb 1 |
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.m_drawing resb 1 |
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.s_drawing resb 1 |
| .vsync resb 1 |
.vsync resb 1 |
| .vsyncint resb 1 |
.vsyncint resb 1 |
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.display resb 1 |
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.bitac resb 1 |
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.reserved resb 2 |
| .analog resd 1 |
.analog resd 1 |
| .palnum resd 1 |
.palnum resd 1 |
| .degpal resb 4 |
.degpal resb 4 |
| .anapal resd 16 |
.anapal resd 16 |
| .clock resb 1 |
.dispclock resd 1 |
| .display resb 1 |
.vsyncclock resd 1 |
| .bitac resb 1 |
.rasterclock resd 1 |
| .m_drawing resb 1 |
.hsyncclock resd 1 |
| .s_drawing resb 1 |
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| .reserved resb 3 |
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| endstruc |
endstruc |
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| struc gdcs_t |
struc gdcs_t |
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Line 124 GDCCMD_MAX equ 32
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Line 139 GDCCMD_MAX equ 32
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| .tile_e resw 1 |
.tile_e resw 1 |
| endstruc |
endstruc |
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| struc extmem_t |
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| .maxmem resd 1 |
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| .pageptr resd 4 |
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| .target resd 1 |
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| .page resd 4 |
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| endstruc |
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| struc cgwin_t |
struc cgwin_t |
| .low resd 1 |
.low resd 1 |
| .high resd 1 |
.high resd 1 |
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Line 161 GDCCMD_MAX equ 32
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Line 169 GDCCMD_MAX equ 32
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| .func resd 1 |
.func resd 1 |
| .remain resd 1 |
.remain resd 1 |
| .stack resd 1 |
.stack resd 1 |
| resd 4 |
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| .buf resb (4096/8 + 4*4) |
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| resd 4 |
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| .inptr resd 1 |
.inptr resd 1 |
| .outptr resd 1 |
.outptr resd 1 |
| .mask2 resw 1 |
.mask2 resw 1 |
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Line 172 GDCCMD_MAX equ 32
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Line 177 GDCCMD_MAX equ 32
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| .dstbit resb 1 |
.dstbit resb 1 |
| .sft8bitl resb 1 |
.sft8bitl resb 1 |
| .sft8bitr resb 1 |
.sft8bitr resb 1 |
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resd 4 |
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.buf resb (4096/8 + 4*4) |
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resd 4 |
| endstruc |
endstruc |
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| struc dsync_t |
struc dsync_t |
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