--- np2/wince/arm/makegrph.s	2003/12/21 23:27:09	1.4
+++ np2/wince/arm/makegrph.s	2004/02/18 21:58:42	1.7
@@ -61,23 +61,24 @@ G_MASTER			equ		(GD_SIZE * -1)
 G_SLAVE				equ		0
 G_MODE1				equ		(GD_SIZE + &00)
 ; G_mode2			equ		(GD_SIZE + &01)
-; G_vsync			equ		(GD_SIZE + &02)
-; G_vsyncint		equ		(GD_SIZE + &03)
-; G_analog			equ		(GD_SIZE + &04)
-; G_palnum			equ		(GD_SIZE + &08)
-; G_degpal			equ		(GD_SIZE + &0c)
-; G_anapal			equ		(GD_SIZE + &10)
-G_CLOCK				equ		(GD_SIZE + &50)
-; G_display			equ		(GD_SIZE + &51)
-; G_bitac			equ		(GD_SIZE + &52)
-; G_m_drawing		equ		(GD_SIZE + &53)
-; G_s_drawing		equ		(GD_SIZE + &54)
+G_CLOCK				equ		(GD_SIZE + &02)
+; G_crt15khz		equ		(GD_SIZE + &03)
+; G_m_drawing		equ		(GD_SIZE + &04)
+; G_s_drawing		equ		(GD_SIZE + &05)
+; G_vsync			equ		(GD_SIZE + &06)
+; G_vsyncint		equ		(GD_SIZE + &07)
+; G_display			equ		(GD_SIZE + &08)
+; G_bitac			equ		(GD_SIZE + &09)
+; G_analog			equ		(GD_SIZE + &0c)
+; G_palnum			equ		(GD_SIZE + &10)
+; G_degpal			equ		(GD_SIZE + &14)
+; G_anapal			equ		(GD_SIZE + &18)
 
 
 	INCLUDE	..\..\i286a\i286a.inc
 
 	IMPORT	np2cfg
-	IMPORT	i286core
+	IMPORT	i286acore
 	IMPORT	np2_vram
 	IMPORT	dsync
 	IMPORT	vramupdate
@@ -85,7 +86,7 @@ G_CLOCK				equ		(GD_SIZE + &50)
 	IMPORT	gdc
 
 	EXPORT	grph_table0
-	EXPORT	makegrph_init
+	EXPORT	makegrph_initialize
 	EXPORT	makegrph
 
 	AREA	.rdata, DATA, READONLY
@@ -110,7 +111,8 @@ grph_table0		dcd		&00000000
 
 	AREA	.text, CODE, READONLY
 
-makegrph_init	mov		pc, lr
+makegrph_initialize
+				mov		pc, lr
 
 
 	; r8 = mem
@@ -327,7 +329,7 @@ mg_updclear		ldr		r12, [r7, r4]
 
 gp_dsync		dcd		dsync
 gp_vramupdate	dcd		vramupdate
-gp_vmem			dcd		i286core + CPU_SIZE + VRAM_B
+gp_vmem			dcd		i286acore + CPU_SIZE + VRAM_B
 gp_gdc			dcd		gdc - G_MASTER
 gp_gtable0		dcd		grph_table0
 gp_np2vram		dcd		np2_vram