| version 1.10, 2004/08/12 20:09:42 | version 1.15, 2004/08/17 09:35:09 | 
| Line 1 | Line 1 | 
 | #include        "compiler.h" | #include        "compiler.h" | 
 | #include        "scrnmng.h" | #include        "scrnmng.h" | 
 |  | #include        "z80core.h" | 
 | #include        "pccore.h" | #include        "pccore.h" | 
 | #include        "iocore.h" | #include        "iocore.h" | 
 | #include        "vram.h" | #include        "vram.h" | 
| Line 22  static const UINT16 defpalgrph[64] = { | Line 23  static const UINT16 defpalgrph[64] = { | 
 |  |  | 
 | static const UINT8 defrgbp[4] = {0xaa, 0xcc, 0xf0, 0x00}; | static const UINT8 defrgbp[4] = {0xaa, 0xcc, 0xf0, 0x00}; | 
 | static const UINT8 defreg[18] = { | static const UINT8 defreg[18] = { | 
| 55, 40, 45, 0x36, | 0x37, 0x28, 0x2d, 0x34, | 
| 31, 10, 25, 28, | 0x1f, 0x02, 0x19, 0x1c, | 
| 7, 7, 0, 0, | 0x00, 0x07, 0x00, 0x00, | 
| 0, 0, 0, 0, 0, 0}; | 0x00, 0x00, 0x00, 0x00, | 
|  | 0x00, 0x00}; | 
|  |  | 
|  | typedef struct { | 
|  | UINT32  clock; | 
|  | UINT    minx; | 
|  | UINT    maxx; | 
|  | UINT    miny; | 
|  | UINT    maxy; | 
|  | } GDCCLK; | 
|  |  | 
|  | static const GDCCLK gdcclk[] = { | 
|  | {14318180 / 8, 112 - 8, 112 + 8, 200, 300}, | 
|  | {21052600 / 8, 108 - 6, 108 + 6, 400, 575}}; | 
|  |  | 
|  | enum { | 
|  | CRTCUPD_CLOCK           = 0x01, | 
|  | CRTCUPD_TIMING          = 0x02, | 
|  | CRTCUPD_POS                     = 0x04 | 
|  | }; | 
|  |  | 
|  |  | 
|  | static void crtc_clkupdate(void) { | 
|  |  | 
|  | UINT            clksync; | 
|  | const GDCCLK    *clk; | 
|  | UINT            h; | 
|  | UINT            fonty; | 
|  | UINT            v; | 
|  |  | 
|  | clksync = (crtc.s.SCRN_BITS & SCRN_24KHZ); | 
|  | clk = gdcclk + clksync; | 
|  | h = crtc.s.reg[CRTCREG_HSIZE] + 1; | 
|  | if (crtc.s.width40) { | 
|  | h = h * 2; | 
|  | } | 
|  | if (h < clk->minx) { | 
|  | h = clk->minx; | 
|  | } | 
|  | else if (h > clk->maxx) { | 
|  | h = clk->maxx; | 
|  | } | 
|  | crtc.e.rasterclock8 = (4000000 * h) / (clk->clock >> 8); | 
|  |  | 
|  | fonty = crtc.s.reg[CRTCREG_CHRCY] & 0x1f; | 
|  | fonty >>= clksync; | 
|  | fonty += 1; | 
|  | crtc.e.fonty = fonty; | 
|  |  | 
|  | v = (crtc.s.reg[CRTCREG_CHRCY] & 0x1f) + 1; | 
|  | v = v * ((crtc.s.reg[CRTCREG_VSIZE] & 0x7f) + 1); | 
|  | v = v + (crtc.s.reg[CRTCREG_VSIZEA] & 0x1f); | 
|  | if (v < clk->miny) { | 
|  | v = clk->miny; | 
|  | } | 
|  | else if (v > clk->maxy) { | 
|  | v = clk->maxy; | 
|  | } | 
|  | crtc.e.frameclock = ((4000000 * h) / clk->clock) * v; | 
|  | } | 
|  |  | 
|  | static void crtc_timingupdate(void) { | 
 |  |  | 
 |  | UINT32  fontclock; | 
 |  | UINT    yl; | 
 |  |  | 
| void crtc_bankupdate(void) { | // とりあえず…ね | 
|  | crtc.e.rasterdisp8 = (crtc.e.rasterclock8 * 40) / 56; | 
|  |  | 
|  | fontclock = (crtc.s.reg[CRTCREG_CHRCY] & 0x1f) + 1; | 
|  | fontclock = (fontclock * crtc.e.rasterclock8) >> 8; | 
|  |  | 
|  | // YsIIIが yl==0で disp信号見る…なんで? | 
|  | yl = (crtc.s.reg[CRTCREG_VDISP] & 0x7f); | 
|  | crtc.e.yl = yl; | 
|  | crtc.e.dispclock = fontclock * max(yl, 1); | 
|  | crtc.e.vsyncstart = fontclock * ((crtc.s.reg[CRTCREG_VSYNC] & 0x7f) + 1); | 
|  | crtc.e.vpulseclock = ((crtc.s.reg[CRTCREG_PULSE] >> 4) | 
|  | * crtc.e.rasterclock8) >> 8; | 
|  |  | 
|  | crtc.e.pos = crtc.s.reg[CRTCREG_POSL] | 
|  | + ((crtc.s.reg[CRTCREG_POSH] & 7) << 8); | 
|  | } | 
|  |  | 
|  | static void crtc_bankupdate(void) { | 
 |  |  | 
 | UINT    updatemask; | UINT    updatemask; | 
 | UINT8   dispmode; | UINT8   dispmode; | 
| Line 44  void crtc_bankupdate(void) { | Line 126  void crtc_bankupdate(void) { | 
 | crtc.e.updatebit = UPDATE_VRAM0; | crtc.e.updatebit = UPDATE_VRAM0; | 
 | } | } | 
 | dispmode = (crtc.s.SCRN_BITS & SCRN_DISPVRAM)?SCRN_BANK1:SCRN_BANK0; | dispmode = (crtc.s.SCRN_BITS & SCRN_DISPVRAM)?SCRN_BANK1:SCRN_BANK0; | 
| pal_bank = pal_disp = PAL_NORMAL; | pal_bank = PAL_NORMAL; | 
|  | pal_disp = PAL_NORMAL; | 
 |  |  | 
 | if ((!(crtc.s.EXTPALMODE & 0x80)) || (crtc.s.SCRN_BITS & SCRN_UNDERLINE)) { | if ((!(crtc.s.EXTPALMODE & 0x80)) || (crtc.s.SCRN_BITS & SCRN_UNDERLINE)) { | 
 | updatemask = 0x7ff; | updatemask = 0x7ff; | 
| if ((crtc.s.SCRN_BITS & SCRN_24KHZ) && | if ((crtc.s.SCRN_BITS & SCRN_24KHZ) && (!crtc.s.width40)) { | 
| (crtc.s.reg[CRTCREG_HDISP] == 80)) { | pal_bank = PAL_HIGHRESO; | 
| pal_bank = pal_disp = PAL_HIGHRESO; | pal_disp = PAL_HIGHRESO; | 
 | } | } | 
 | if (crtc.s.SCRN_BITS & SCRN_TEXTYx2) { | if (crtc.s.SCRN_BITS & SCRN_TEXTYx2) { | 
 | updatemask = 0x3ff; | updatemask = 0x3ff; | 
| Line 60  void crtc_bankupdate(void) { | Line 143  void crtc_bankupdate(void) { | 
 | updatemask = 0x3ff; | updatemask = 0x3ff; | 
 | if (!(crtc.s.SCRN_BITS & SCRN_TEXTYx2)) { | if (!(crtc.s.SCRN_BITS & SCRN_TEXTYx2)) { | 
 | if (crtc.s.SCRN_BITS & SCRN_24KHZ) { | if (crtc.s.SCRN_BITS & SCRN_24KHZ) { | 
| if (crtc.s.reg[CRTCREG_HDISP] == 40) { | if (crtc.s.width40) { | 
 | if (crtc.s.SCRN_BITS & SCRN_200LINE) {  // width 40,25,0,2 | if (crtc.s.SCRN_BITS & SCRN_200LINE) {  // width 40,25,0,2 | 
 | dispmode |= SCRN64_320x200; | dispmode |= SCRN64_320x200; | 
 | } | } | 
| Line 74  void crtc_bankupdate(void) { | Line 157  void crtc_bankupdate(void) { | 
 | } | } | 
 | } | } | 
 | else { | else { | 
| if (crtc.s.reg[CRTCREG_HDISP] == 40) {          // width 40,25,0,1 | if (crtc.s.width40) {                                           // width 40,25,0,1 | 
 | if (crtc.s.EXTPALMODE & 0x10) { | if (crtc.s.EXTPALMODE & 0x10) { | 
 | if (crtc.s.ZPRY & 0x10) { | if (crtc.s.ZPRY & 0x10) { | 
 | dispmode = SCRN64_L320x200x2 | | dispmode = SCRN64_L320x200x2 | | 
| Line 105  void crtc_bankupdate(void) { | Line 188  void crtc_bankupdate(void) { | 
 | } | } | 
 | else { | else { | 
 | if (crtc.s.SCRN_BITS & SCRN_24KHZ) { | if (crtc.s.SCRN_BITS & SCRN_24KHZ) { | 
| if (crtc.s.reg[CRTCREG_HDISP] == 40) { | if (crtc.s.width40) { | 
 | if (crtc.s.SCRN_BITS & SCRN_200LINE) {  // width 40,12,0,2 | if (crtc.s.SCRN_BITS & SCRN_200LINE) {  // width 40,12,0,2 | 
 | dispmode |= SCRN64_320x100; | dispmode |= SCRN64_320x100; | 
 | } | } | 
| Line 118  void crtc_bankupdate(void) { | Line 201  void crtc_bankupdate(void) { | 
 | } | } | 
 | } | } | 
 | else { | else { | 
| if (crtc.s.reg[CRTCREG_HDISP] == 40) {          // width 40,12,0,1 | if (crtc.s.width40) {                                           // width 40,12,0,1 | 
 | if (crtc.s.EXTPALMODE & 0x10) { | if (crtc.s.EXTPALMODE & 0x10) { | 
 | if (crtc.s.ZPRY & 0x10) { | if (crtc.s.ZPRY & 0x10) { | 
 | dispmode = SCRN64_320x100x2 | | dispmode = SCRN64_320x100x2 | | 
| Line 153  void crtc_bankupdate(void) { | Line 236  void crtc_bankupdate(void) { | 
 | crtc.e.pal_disp = pal_disp; | crtc.e.pal_disp = pal_disp; | 
 | } | } | 
 |  |  | 
 | void crtc_regupdate(void) { |  | 
 |  |  | 
 | UINT    fonty; |  | 
 | SINT32  fontyclock; |  | 
 |  |  | 
 | crtc.e.pos = crtc.s.reg[CRTCREG_POSL] |  | 
 | + ((crtc.s.reg[CRTCREG_POSH] & 7) << 8); |  | 
 |  |  | 
 | fonty = crtc.s.reg[CRTCREG_CHRCY] & 0x1f; |  | 
 | if (crtc.s.SCRN_BITS & SCRN_24KHZ) { |  | 
 | fonty >>= 1; |  | 
 | } |  | 
 | fonty += 1; |  | 
 | crtc.e.fonty = fonty; |  | 
 | crtc.e.yl = (crtc.s.reg[CRTCREG_VDISP] & 0x7f); |  | 
 |  |  | 
 | fontyclock = fonty * RASTER_CLOCK; |  | 
 | crtc.e.dispclock = fontyclock * crtc.e.yl; |  | 
 | crtc.e.vsyncstart = fontyclock * ((crtc.s.reg[CRTCREG_VSYNC] & 0x7f) + 1); |  | 
 | crtc.e.vpulseclock = (crtc.s.reg[CRTCREG_PULSE] >> 4) * RASTER_CLOCK; |  | 
 | crtc.e.vl = fonty * ((crtc.s.reg[CRTCREG_VSIZE] & 0x7f) + 1) |  | 
 | + (crtc.s.reg[CRTCREG_VSIZEA] & 0x1f); |  | 
 | } |  | 
 |  |  | 
 |  |  | 
 | // ---- CRTC | // ---- CRTC | 
 |  |  | 
| Line 190  void IOOUTCALL crtc_o(UINT port, REG8 va | Line 249  void IOOUTCALL crtc_o(UINT port, REG8 va | 
 | if (crtc.s.regnum < CRTCREG_MAX) { | if (crtc.s.regnum < CRTCREG_MAX) { | 
 | if (crtc.s.reg[crtc.s.regnum] != value) { | if (crtc.s.reg[crtc.s.regnum] != value) { | 
 | crtc.s.reg[crtc.s.regnum] = value; | crtc.s.reg[crtc.s.regnum] = value; | 
 |  | crtc_clkupdate(); | 
 |  | crtc_timingupdate(); | 
 | crtc_bankupdate(); | crtc_bankupdate(); | 
 | makescrn.remakeattr = 1; | makescrn.remakeattr = 1; | 
 | crtc_regupdate(); |  | 
 | scrnallflash = 1; | scrnallflash = 1; | 
 | } | } | 
 | } | } | 
| Line 212  void IOOUTCALL scrn_o(UINT port, REG8 va | Line 272  void IOOUTCALL scrn_o(UINT port, REG8 va | 
 | //              pal_reset();                                    // なんで? | //              pal_reset();                                    // なんで? | 
 | scrnallflash = 1; | scrnallflash = 1; | 
 | makescrn.palandply = 1; | makescrn.palandply = 1; | 
| crtc_regupdate(); | crtc_clkupdate(); | 
|  | crtc_timingupdate(); | 
 | } | } | 
 | crtc_bankupdate(); | crtc_bankupdate(); | 
 | (void)port; | (void)port; | 
| Line 415  REG8 IOINPCALL blackctrl_i(UINT port) { | Line 476  REG8 IOINPCALL blackctrl_i(UINT port) { | 
 |  |  | 
 | // ---- | // ---- | 
 |  |  | 
 |  | void crtc_update(void) { | 
 |  |  | 
 |  | crtc_clkupdate(); | 
 |  | crtc_timingupdate(); | 
 |  | crtc_bankupdate(); | 
 |  | makescrn.palandply = 1; | 
 |  | scrnallflash = 1; | 
 |  | } | 
 |  |  | 
 |  | void crtc_setwidth(REG8 width40) { | 
 |  |  | 
 |  | crtc.s.width40 = width40; | 
 |  | crtc_update(); | 
 |  | } | 
 |  |  | 
 |  |  | 
 |  | // ---- | 
 |  |  | 
 | static void resetpal(void) { | static void resetpal(void) { | 
 |  |  | 
 | CopyMemory(crtc.p.text, defpaltext, sizeof(defpaltext)); | CopyMemory(crtc.p.text, defpaltext, sizeof(defpaltext)); | 
| Line 437  void crtc_reset(void) { | Line 516  void crtc_reset(void) { | 
 | ZeroMemory(&crtc, sizeof(crtc)); | ZeroMemory(&crtc, sizeof(crtc)); | 
 | CopyMemory(crtc.s.rgbp, defrgbp, 4); | CopyMemory(crtc.s.rgbp, defrgbp, 4); | 
 | CopyMemory(crtc.s.reg, defreg, 18); | CopyMemory(crtc.s.reg, defreg, 18); | 
 |  | crtc.s.width40 = 1; | 
 | if (pccore.ROM_TYPE < 3) { | if (pccore.ROM_TYPE < 3) { | 
 | resetpal(); | resetpal(); | 
 | } | } | 
| if ((pccore.ROM_TYPE >= 2) && (!(pccore.DIP_SW & 1))) { | //      IPLが勝手に切り替える筈である | 
| crtc.s.SCRN_BITS = SCRN_200LINE; | //      if ((pccore.ROM_TYPE >= 2) && (!(pccore.DIP_SW & 1))) { | 
| crtc.s.reg[CRTCREG_CHRCY] = 15; | //              crtc.s.SCRN_BITS = SCRN_200LINE; | 
| } | //              crtc.s.reg[CRTCREG_CHRCY] = 15; | 
|  | //      } | 
 |  |  | 
 | pal_reset(); | pal_reset(); | 
 | crtc_bankupdate(); |  | 
 | crtc_regupdate(); |  | 
 | makescrn.palandply = 1; | makescrn.palandply = 1; | 
| scrnallflash = 1; | crtc_update(); | 
 | } | } | 
 |  |  | 
 | void crtc_forcesetwidth(REG8 width) { | void crtc_forcesetwidth(REG8 width) { |