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| version 1.12, 2004/08/17 14:46:37 | version 1.15, 2008/06/02 20:07:31 |
|---|---|
| Line 24 enum { | Line 24 enum { |
| #define PAL_4096 0x10 | #define PAL_4096 0x10 |
| #define SCRN_BANK0 0x00 | #if !defined(SUPPORT_TURBOZ) |
| #define SCRN_BANK1 0x80 | enum { |
| #define SCRN_DRAW4096 0x40 | DISPMODE_24KHZ = 0x01, |
| DISPMODE_200L = 0x02, | |
| #define SCRN64_MASK 0x0f | DISPMODE_TEXTYx2 = 0x04, |
| #define SCRN64_INVALID 0 | DISPMODE_UNDERLINE = 0x08, |
| #define SCRN64_320x200 1 | |
| #define SCRN64_L320x200x2 2 | DISPMODE_MASKMODE = 0x0f, |
| #define SCRN64_L640x200 3 | DISPMODE_WIDTH80 = 0x40, |
| #define SCRN64_H320x400 4 | DISPMODE_BANK1 = 0x80 |
| #define SCRN64_320x200x4096 5 | }; |
| #else | |
| #define SCRN64_320x100 6 | enum { |
| #define SCRN64_320x100x2 7 | DISPMODE_24KHZ = 0x01, |
| #define SCRN64_L640x100 8 | DISPMODE_200L = 0x02, |
| #define SCRN64_H320x200 9 | DISPMODE_TEXTYx2 = 0x04, |
| #define SCRN64_320x100x4096 10 | DISPMODE_UNDERLINE = 0x08, |
| DISPMODE_SCRN64 = 0x10, | |
| DISPMODE64_320x200 = 0x10, | |
| DISPMODE64_L320x200x2 = 0x11, | |
| DISPMODE64_L640x200 = 0x12, | |
| DISPMODE64_H320x400 = 0x13, | |
| DISPMODE64_320x200x4096 = 0x14, | |
| DISPMODE64_320x100 = 0x15, | |
| DISPMODE64_320x100x2 = 0x16, | |
| DISPMODE64_L640x100 = 0x17, | |
| DISPMODE64_H320x200 = 0x18, | |
| DISPMODE64_320x100x4096 = 0x19, | |
| DISPMODE_MASKMODE = 0x1f, | |
| DISPMODE_4096 = 0x20, | |
| DISPMODE_WIDTH80 = 0x40, | |
| DISPMODE_BANK1 = 0x80 | |
| }; | |
| #endif | |
| enum { | |
| SCRN_BANK0 = 0x00, | |
| SCRN_BANK1 = 0x80, | |
| SCRN_WIDTH80 = 0x40, | |
| SCRN_DRAW4096 = 0x20, | |
| SCRN64_320x200 = 0x10, | |
| SCRN64_L320x200x2 = 0x11, | |
| SCRN64_L640x200 = 0x12, | |
| SCRN64_H320x400 = 0x13, | |
| SCRN64_320x200x4096 = 0x14, | |
| SCRN64_320x100 = 0x15, | |
| SCRN64_320x100x2 = 0x16, | |
| SCRN64_L640x100 = 0x17, | |
| SCRN64_H320x200 = 0x18, | |
| SCRN64_320x100x4096 = 0x19, | |
| SCRN64_MASK = 0x1f, | |
| SCRN64_ENABLE = 0x10 | |
| }; | |
| // SCRN_24KHZ 0x01 // 0:15KHz 1:24KHz | /* SCRN_24KHZ 0x01 - 0:15KHz 1:24KHz |
| // SCRN_200LINE 0x02 // 0:400line 1:200line | * SCRN_200LINE 0x02 - 0:400line 1:200line |
| // SCRN_TEXTYx2 0x04 // 0:ノーマル 1:縦に拡大 | * SCRN_TEXTYx2 0x04 - 0:ノーマル 1:縦に拡大 |
| // SCRN_DISPVRAM 0x08 // 0:表 1:裏 | * SCRN_DISPVRAM 0x08 - 0:表 1:裏 |
| // SCRN_ACCESSVRAM 0x10 // 0:表 1:裏 | * SCRN_ACCESSVRAM 0x10 - 0:表 1:裏 |
| // SCRN_PCGMODE 0x20 // 0:互換 1:高速 | * SCRN_PCGMODE 0x20 - 0:互換 1:高速 |
| // SCRN_CPUFONT 0x40 // 0:8ラスタ 1:16ラスタ | * SCRN_CPUFONT 0x40 - 0:8ラスタ 1:16ラスタ |
| // SCRN_UNDERLINE 0x80 // 0:なし 1:あり | * SCRN_UNDERLINE 0x80 - 0:なし 1:あり |
| */ | |
| enum { | enum { |
| SCRN_24KHZ = 0x01, | SCRN_24KHZ = 0x01, |
| Line 63 enum { | Line 104 enum { |
| SCRN_CPUFONT = 0x40, | SCRN_CPUFONT = 0x40, |
| SCRN_UNDERLINE = 0x80, | SCRN_UNDERLINE = 0x80, |
| SCRN_DISPCHANGE = SCRN_24KHZ|SCRN_200LINE|SCRN_TEXTYx2|SCRN_UNDERLINE | SCRN_DISPCHANGE = SCRN_24KHZ + SCRN_200LINE + SCRN_TEXTYx2 + SCRN_DISPVRAM + SCRN_UNDERLINE |
| }; | }; |
| enum { | enum { |
| Line 99 typedef struct { | Line 140 typedef struct { |
| } CRTCSTAT; | } CRTCSTAT; |
| typedef struct { | typedef struct { |
| SINT32 rasterclock8; | UINT8 scrnflash; |
| SINT32 rasterdisp8; | UINT8 scrnallflash; |
| UINT fonty; | UINT8 remakeattr; /* doubleatrchange */ |
| UINT yl; | UINT8 palandply; |
| SINT32 frameclock; | |
| UINT8 *gramacc; /* curvram */ | |
| UINT8 *gram; // curvram | #if (!defined(MEMOPTIMIZE)) || (MEMOPTIMIZE < 100) |
| UINT updatemask; // updatemsk | UINT updatemask; /* updatemsk */ |
| UINT8 updatebit; // curupdt | UINT8 updatebit; /* curupdt */ |
| #else | |
| UINT8 updatebit; /* curupdt */ | |
| UINT8 _padding1; | |
| UINT16 updatemask; /* updatemsk */ | |
| UINT8 _padding2; | |
| #endif | |
| UINT8 dispmode; | UINT8 dispmode; |
| UINT8 existblink; /* blinkflag */ | |
| UINT8 blinktime; | |
| #if defined(SUPPORT_TURBOZ) | #if defined(SUPPORT_TURBOZ) |
| UINT8 pal_bank; | UINT8 pal_bank; |
| UINT8 pal_disp; | UINT8 pal_disp; |
| UINT8 pal_padding[2]; | |
| #endif | #endif |
| SINT32 rasterclock8; | |
| SINT32 rasterdisp8; | |
| SINT32 frameclock; | |
| UINT fonty; | |
| UINT yl; | |
| UINT pos; | UINT pos; |
| SINT32 dispclock; | |
| SINT32 vsyncstart; | |
| SINT32 vpulseclock; | |
| } CRTCEXT; | } CRTCEXT; |
| #if defined(SUPPORT_TURBOZ) | #if defined(SUPPORT_TURBOZ) |
| Line 130 typedef struct { | Line 182 typedef struct { |
| #endif | #endif |
| typedef struct { | typedef struct { |
| CRTCSTAT s; | |
| CRTCEXT e; | CRTCEXT e; |
| CRTCSTAT s; | |
| #if defined(SUPPORT_TURBOZ) | #if defined(SUPPORT_TURBOZ) |
| CRTCPAL p; | CRTCPAL p; |
| #endif | #endif |
| } CRTC; | } CRTC; |
| // ---- | /* functions */ |
| void crtc_setwidth(REG8 width40); | void crtc_setwidth(REG8 width40); |
| void crtc_update(void); | void crtc_update(void); |
| void IOOUTCALL crtc_o(UINT port, REG8 value); // x1_crtc_w | void IOOUTCALL crtc_o(UINT port, REG8 value); |
| void IOOUTCALL scrn_o(UINT port, REG8 value); // x1_scrn_w | void IOOUTCALL scrn_o(UINT port, REG8 value); |
| REG8 IOINPCALL scrn_i(UINT port); // x1_scrn_r | REG8 IOINPCALL scrn_i(UINT port); |
| void IOOUTCALL ply_o(UINT port, REG8 value); // x1_ply_w | void IOOUTCALL ply_o(UINT port, REG8 value); |
| void IOOUTCALL palette_o(UINT port, REG8 value); // x1_palet_w | void IOOUTCALL palette_o(UINT port, REG8 value); |
| void IOOUTCALL blackctrl_o(UINT port, REG8 value); // x1_blackctrl_w | void IOOUTCALL blackctrl_o(UINT port, REG8 value); |
| REG8 IOINPCALL blackctrl_i(UINT port); // x1_blackctrl_r | REG8 IOINPCALL blackctrl_i(UINT port); |
| #if defined(SUPPORT_TURBOZ) | #if defined(SUPPORT_TURBOZ) |
| REG8 IOINPCALL ply_i(UINT port); // x1_ply_r | REG8 IOINPCALL ply_i(UINT port); |
| REG8 IOINPCALL palette_i(UINT port); // x1_palet_r | REG8 IOINPCALL palette_i(UINT port); |
| void IOOUTCALL extpal_o(UINT port, REG8 value); // x1_extpal_w | void IOOUTCALL extpal_o(UINT port, REG8 value); |
| REG8 IOINPCALL extpal_i(UINT port); // x1_extpal_r | REG8 IOINPCALL extpal_i(UINT port); |
| void IOOUTCALL extgrphpal_o(UINT port, REG8 value); // x1_extgrphpal_w | void IOOUTCALL extgrphpal_o(UINT port, REG8 value); |
| REG8 IOINPCALL extgrphpal_i(UINT port); // x1_extgrphpal_r | REG8 IOINPCALL extgrphpal_i(UINT port); |
| void IOOUTCALL exttextpal_o(UINT port, REG8 value); // x1_exttextpal_w | void IOOUTCALL exttextpal_o(UINT port, REG8 value); |
| REG8 IOINPCALL exttextpal_i(UINT port); // x1_exttextpal_r | REG8 IOINPCALL exttextpal_i(UINT port); |
| void IOOUTCALL exttextdisp_o(UINT port, REG8 value); // x1_exttextdisp_w | void IOOUTCALL exttextdisp_o(UINT port, REG8 value); |
| REG8 IOINPCALL exttextdisp_i(UINT port); // x1_exttextdisp_r | REG8 IOINPCALL exttextdisp_i(UINT port); |
| #endif | #endif |