--- xmil/io/crtc.h	2004/08/12 20:09:42	1.7
+++ xmil/io/crtc.h	2004/08/18 08:08:13	1.13
@@ -7,7 +7,9 @@ enum {
 	CRTC_PALB		= 0,
 	CRTC_PALR		= 1,
 	CRTC_PALG		= 2,
-	CRTC_PLY		= 3
+	CRTC_PLY		= 3,
+	CRTC_BLACK		= 4,
+	CRTC_RGBPMAX	= 5
 };
 
 #define	PAL_NORMAL		0x00
@@ -22,25 +24,65 @@ enum {
 #define	PAL_4096		0x10
 
 
-#define	SCRN_BANK0			0x00
-#define	SCRN_BANK1			0x80
-#define	SCRN_DRAW4096		0x40
-
-#define	SCRN64_MASK				0x0f
-#define	SCRN64_INVALID			0
-#define	SCRN64_320x200			1
-#define	SCRN64_L320x200x2		2
-#define	SCRN64_L640x200			3
-#define	SCRN64_H320x400			4
-#define	SCRN64_320x200x4096		5
-
-#define	SCRN64_320x100			6
-#define	SCRN64_320x100x2		7
-#define	SCRN64_L640x100			8
-#define	SCRN64_H320x200			9
-#define	SCRN64_320x100x4096		10
+#if !defined(SUPPORT_TURBOZ)
+enum {
+	DISPMODE_24KHZ			= 0x01,
+	DISPMODE_200L			= 0x02,
+	DISPMODE_TEXTYx2		= 0x04,
+	DISPMODE_UNDERLINE		= 0x08,
+
+	DISPMODE_MASKMODE		= 0x0f,
+	DISPMODE_WIDTH80		= 0x40,
+	DISPMODE_BANK1			= 0x80
+};
+#else
+enum {
+	DISPMODE_24KHZ			= 0x01,
+	DISPMODE_200L			= 0x02,
+	DISPMODE_TEXTYx2		= 0x04,
+	DISPMODE_UNDERLINE		= 0x08,
+
+	DISPMODE_SCRN64			= 0x10,
+	DISPMODE64_320x200		= 0x10,
+	DISPMODE64_L320x200x2	= 0x11,
+	DISPMODE64_L640x200		= 0x12,
+	DISPMODE64_H320x400		= 0x13,
+	DISPMODE64_320x200x4096	= 0x14,
+	DISPMODE64_320x100		= 0x15,
+	DISPMODE64_320x100x2	= 0x16,
+	DISPMODE64_L640x100		= 0x17,
+	DISPMODE64_H320x200		= 0x18,
+	DISPMODE64_320x100x4096	= 0x19,
+
+	DISPMODE_MASKMODE		= 0x1f,
+	DISPMODE_4096			= 0x20,
+	DISPMODE_WIDTH80		= 0x40,
+	DISPMODE_BANK1			= 0x80
+};
+#endif
 
 
+enum {
+	SCRN_BANK0				= 0x00,
+	SCRN_BANK1				= 0x80,
+	SCRN_WIDTH80			= 0x40,
+	SCRN_DRAW4096			= 0x20,
+
+	SCRN64_320x200			= 0x10,
+	SCRN64_L320x200x2		= 0x11,
+	SCRN64_L640x200			= 0x12,
+	SCRN64_H320x400			= 0x13,
+	SCRN64_320x200x4096		= 0x14,
+	SCRN64_320x100			= 0x15,
+	SCRN64_320x100x2		= 0x16,
+	SCRN64_L640x100			= 0x17,
+	SCRN64_H320x200			= 0x18,
+	SCRN64_320x100x4096		= 0x19,
+
+	SCRN64_MASK				= 0x1f,
+	SCRN64_ENABLE			= 0x10
+};
+
 
 //	SCRN_24KHZ		0x01	// 0:15KHz		1:24KHz
 //	SCRN_200LINE	0x02	// 0:400line	1:200line
@@ -61,7 +103,7 @@ enum {
 	SCRN_CPUFONT	= 0x40,
 	SCRN_UNDERLINE	= 0x80,
 
-	SCRN_DISPCHANGE	= SCRN_24KHZ|SCRN_200LINE|SCRN_TEXTYx2|SCRN_UNDERLINE
+	SCRN_DISPCHANGE	= SCRN_24KHZ + SCRN_200LINE + SCRN_TEXTYx2 + SCRN_DISPVRAM + SCRN_UNDERLINE
 };
 
 enum {
@@ -74,60 +116,72 @@ enum {
 	CRTCREG_VDISP		= 6,
 	CRTCREG_VSYNC		= 7,
 	CRTCREG_CHRCY		= 9,
-	CRTCREG_POSL		= 12,
-	CRTCREG_POSH		= 13,
+	CRTCREG_POSH		= 12,
+	CRTCREG_POSL		= 13,
 
 	CRTCREG_MAX			= 18
 };
 
 
 typedef struct {
-	UINT8	rgbp[4];
 	UINT8	SCRN_BITS;
+	UINT8	width40;
 	UINT8	regnum;
+	UINT8	padding;
+	UINT8	rgbp[6];
 	UINT8	reg[CRTCREG_MAX];
-	UINT8	BLACKPAL;
+#if defined(SUPPORT_TURBOZ)
 	UINT8	EXTPALMODE;
 	UINT8	EXTGRPHPAL;
 	UINT8	ZPRY;
 	UINT8	lastpal;
+#endif
 } CRTCSTAT;
 
 typedef struct {
+	SINT32	rasterclock8;
+	SINT32	rasterdisp8;
+	UINT	fonty;
+	UINT	yl;
+	SINT32	frameclock;
+
 	UINT8	*gram;				// curvram
 	UINT	updatemask;			// updatemsk
 	UINT8	updatebit;			// curupdt
 	UINT8	dispmode;
+#if defined(SUPPORT_TURBOZ)
 	UINT8	pal_bank;
 	UINT8	pal_disp;
+#endif
 
 	UINT	pos;
-	UINT	fonty;
-	UINT	yl;
 
 	SINT32	dispclock;
 	SINT32	vsyncstart;
 	SINT32	vpulseclock;
-	UINT	vl;
 } CRTCEXT;
 
+#if defined(SUPPORT_TURBOZ)
 typedef struct {
 	UINT8	text[8];
 	UINT16	grph[2][64];
 	UINT16	grph4096[4096];
 } CRTCPAL;
+#endif
 
 typedef struct {
 	CRTCSTAT	s;
 	CRTCEXT		e;
+#if defined(SUPPORT_TURBOZ)
 	CRTCPAL		p;
+#endif
 } CRTC;
 
 
 // ----
 
-void crtc_bankupdate(void);								// vrambank_patch
-void crtc_regupdate(void);
+void crtc_setwidth(REG8 width40);
+void crtc_update(void);
 
 void IOOUTCALL crtc_o(UINT port, REG8 value);			// x1_crtc_w
 
@@ -135,27 +189,32 @@ void IOOUTCALL scrn_o(UINT port, REG8 va
 REG8 IOINPCALL scrn_i(UINT port);						// x1_scrn_r
 
 void IOOUTCALL ply_o(UINT port, REG8 value);			// x1_ply_w
-REG8 IOINPCALL ply_i(UINT port);						// x1_ply_r
-
 void IOOUTCALL palette_o(UINT port, REG8 value);		// x1_palet_w
+
+void IOOUTCALL blackctrl_o(UINT port, REG8 value);		// x1_blackctrl_w
+REG8 IOINPCALL blackctrl_i(UINT port);					// x1_blackctrl_r
+
+
+#if defined(SUPPORT_TURBOZ)
+REG8 IOINPCALL ply_i(UINT port);						// x1_ply_r
 REG8 IOINPCALL palette_i(UINT port);					// x1_palet_r
 
 void IOOUTCALL extpal_o(UINT port, REG8 value);			// x1_extpal_w
 REG8 IOINPCALL extpal_i(UINT port);						// x1_extpal_r
-
 void IOOUTCALL extgrphpal_o(UINT port, REG8 value);		// x1_extgrphpal_w
 REG8 IOINPCALL extgrphpal_i(UINT port);					// x1_extgrphpal_r
-
 void IOOUTCALL exttextpal_o(UINT port, REG8 value);		// x1_exttextpal_w
 REG8 IOINPCALL exttextpal_i(UINT port);					// x1_exttextpal_r
-
 void IOOUTCALL exttextdisp_o(UINT port, REG8 value);	// x1_exttextdisp_w
 REG8 IOINPCALL exttextdisp_i(UINT port);				// x1_exttextdisp_r
+#endif
 
-void IOOUTCALL blackctrl_o(UINT port, REG8 value);		// x1_blackctrl_w
-REG8 IOINPCALL blackctrl_i(UINT port);					// x1_blackctrl_r
 
+#if defined(SUPPORT_TURBOZ)
 void crtc_initialize(void);
+#else
+#define	crtc_initialize()
+#endif
 void crtc_reset(void);
 void crtc_forcesetwidth(REG8 width);