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| version 1.6, 2005/02/04 06:42:11 | version 1.7, 2008/06/02 20:07:31 |
|---|---|
| Line 95 enum { | Line 95 enum { |
| typedef struct { | typedef struct { |
| UINT8 flag; | UINT8 flag; |
| UINT8 WR0; | UINT8 WR0; |
| UINT8 mode; // DMA_MODE | UINT8 mode; /* DMA_MODE */ |
| UINT8 INT_ENBL; | UINT8 INT_ENBL; |
| UINT8 WR4; | UINT8 WR4; |
| Line 109 typedef struct { | Line 109 typedef struct { |
| DMALENG leng; | DMALENG leng; |
| DMAADDR addr; | DMAADDR addr; |
| UINT8 enable; // DMA_ENBL | UINT8 enable; /* DMA_ENBL */ |
| UINT8 ready; // DMA_REDY | UINT8 ready; /* DMA_REDY */ |
| UINT8 RR_MSK; | UINT8 RR_MSK; |
| UINT8 RR; | UINT8 RR; |
| Line 133 typedef struct { | Line 133 typedef struct { |
| UINT8 working; | UINT8 working; |
| UINT8 increment; | UINT8 increment; |
| UINT8 mode; // DMA_MODE | UINT8 mode; /* DMA_MODE */ |
| UINT8 __cmd; // DMA_CMND | UINT8 __cmd; /* DMA_CMND */ |
| UINT8 enable; // DMA_ENBL | UINT8 enable; /* DMA_ENBL */ |
| UINT8 ready; // DMA_REDY | UINT8 ready; /* DMA_REDY */ |
| UINT8 INT_ENBL; | UINT8 INT_ENBL; |
| UINT8 INT_FLG; | UINT8 INT_FLG; |
| Line 153 typedef struct { | Line 153 typedef struct { |
| UINT8 RR; | UINT8 RR; |
| UINT8 WR0; | UINT8 WR0; |
| // UINT8 WR1; | #if 0 |
| // UINT8 WR2; | UINT8 WR1; |
| // UINT8 WR3; | UINT8 WR2; |
| UINT8 WR3; | |
| #endif /* 0 */ | |
| UINT8 WR4; | UINT8 WR4; |
| UINT8 WR5; | UINT8 WR5; |
| UINT8 dummydat; | UINT8 dummydat; |
| // UINT8 padding; | #if 0 |
| UINT8 padding; | |
| #endif /* 0 */ | |
| DMACNT cnt_a; | DMACNT cnt_a; |
| DMACNT cnt_b; | DMACNT cnt_b; |
| Line 185 extern "C" { | Line 189 extern "C" { |
| void dmac_sendready(BRESULT ready); | void dmac_sendready(BRESULT ready); |
| BRESULT ieitem_dmac(UINT id); | BRESULT ieitem_dmac(UINT id); |
| void IOOUTCALL dmac_o(UINT port, REG8 dat); // x1_dma_w | void IOOUTCALL dmac_o(UINT port, REG8 dat); |
| REG8 IOINPCALL dmac_i(UINT port); // x1_dma_r | REG8 IOINPCALL dmac_i(UINT port); |
| void dmac_reset(void); | void dmac_reset(void); |