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| version 1.14, 2004/08/13 02:16:33 | version 1.20, 2004/08/19 09:50:20 |
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| Line 12 | Line 12 |
| static const UINT8 fdctype[] = {1,1,1,1,1,1,1,1,2,2,2,2,3,4,3,3}; | static const UINT8 fdctype[] = {1,1,1,1,1,1,1,1,2,2,2,2,3,4,3,3}; |
| enum { | |
| TAO_MODE_GAP = 0x4e, | |
| TAO_MODE_SYNC = 0x00, | |
| TAO_MODE_AM = 0xf5, | |
| TAO_MODE_IM = 0xf6, | |
| TAO_MODE_ID = 0xfe, | |
| TAO_MODE_DATA = 0xfb, | |
| TAO_ENDOFDATA = 0xf7, | |
| TAO_CMD_GAP = 0x4e, | |
| TAO_CMD_SYNC = 0x00, | |
| TAO_CMD_IM_IN = 0xf6, | |
| TAO_CMD_IM = 0xfc, | |
| TAO_CMD_AM_IN = 0xf5, | |
| TAO_CMD_IAM = 0xfe, | |
| TAO_CMD_DAM = 0xfb, | |
| TAO_CMD_DDAM = 0xf8, | |
| TAO_CMD_CRC = 0xf7 | |
| }; | |
| // ---- | |
| void neitem_fdcbusy(UINT id) { | void neitem_fdcbusy(UINT id) { |
| Line 29 static void setbusy(SINT32 clock) { | Line 51 static void setbusy(SINT32 clock) { |
| fdc.s.busy = TRUE; | fdc.s.busy = TRUE; |
| nevent_set(NEVENT_FDC, clock, neitem_fdcbusy, NEVENT_ABSOLUTE); | nevent_set(NEVENT_FDC, clock, neitem_fdcbusy, NEVENT_ABSOLUTE); |
| } | } |
| else { | |
| fdc.s.busy = FALSE; | |
| nevent_reset(NEVENT_FDC); | |
| } | |
| } | } |
| #if defined(SUPPORT_MOTORRISEUP) | |
| static void setmotor(REG8 drvcmd) { | static void setmotor(REG8 drvcmd) { |
| UINT drv; | UINT drv; |
| Line 76 void fdc_callback(void) { | Line 103 void fdc_callback(void) { |
| } | } |
| } | } |
| static SINT32 motorwait(REG8 drv) { | |
| SINT32 curclock; | |
| SINT32 nextclock; | |
| if (fdc.s.motorevent[drv] == FDCMOTOR_STARTING) { | |
| curclock = CPU_CLOCK + CPU_BASECLOCK - CPU_REMCLOCK; | |
| curclock -= fdc.s.motorclock[drv]; | |
| if (curclock < (SINT32)pccore.realclock) { | |
| nextclock = pccore.realclock - curclock; | |
| // TRACEOUT(("motor starting busy %d", nextclock)); | |
| return(nextclock); | |
| } | |
| } | |
| return(0); | |
| } | |
| #endif | |
| static REG8 getstat(void) { | static REG8 getstat(void) { |
| FDDFILE fdd; | FDDFILE fdd; |
| Line 145 static REG8 type2cmd(REG8 sc) { | Line 191 static REG8 type2cmd(REG8 sc) { |
| FDDFILE fdd; | FDDFILE fdd; |
| UINT size; | UINT size; |
| REG8 stat; | REG8 stat; |
| #if defined(SUPPORT_DISKEXT) | |
| SINT32 clock; | SINT32 clock; |
| #if defined(SUPPORT_DISKEXT) | |
| SINT32 curclock; | SINT32 curclock; |
| SINT32 nextclock; | SINT32 nextclock; |
| UINT32 secinfo; | UINT32 secinfo; |
| Line 163 static REG8 type2cmd(REG8 sc) { | Line 209 static REG8 type2cmd(REG8 sc) { |
| } | } |
| size = sizeof(fdc.s.buffer); | size = sizeof(fdc.s.buffer); |
| fdd = fddfile + fdc.s.drv; | fdd = fddfile + fdc.s.drv; |
| TRACEOUT(("read %.2x %d %d", fdc.s.drv, track, sc)); | // TRACEOUT(("read %.2x %d %d", fdc.s.drv, track, sc)); |
| stat = fdd->read(fdd, fdc.s.media, track, sc, p, &size); | stat = fdd->read(fdd, fdc.s.media, track, sc, p, &size); |
| if (stat & FDDSTAT_RECNFND) { | if (stat & FDDSTAT_RECNFND) { |
| size = 0; | size = 0; |
| Line 186 static REG8 type2cmd(REG8 sc) { | Line 232 static REG8 type2cmd(REG8 sc) { |
| fdc.s.bufsize = size; | fdc.s.bufsize = size; |
| fdc.s.curtime = 0; | fdc.s.curtime = 0; |
| #if defined(SUPPORT_DISKEXT) | |
| // ウェイト値を計算 | |
| clock = 0; | clock = 0; |
| if (fdc.s.motorevent[fdc.s.drv] == FDCMOTOR_STARTING) { | #if defined(SUPPORT_MOTORRISEUP) |
| curclock = CPU_CLOCK + CPU_BASECLOCK - CPU_REMCLOCK; | clock += motorwait(fdc.s.drv); |
| curclock -= fdc.s.motorclock[fdc.s.drv]; | #endif |
| if (curclock < (SINT32)pccore.realclock) { | #if defined(SUPPORT_DISKEXT) |
| nextclock = pccore.realclock - curclock; | |
| TRACEOUT(("motor starting busy %d", nextclock)); | |
| clock += nextclock; | |
| } | |
| } | |
| secinfo = fdd->sec(fdd, fdc.s.media, track, sc); | secinfo = fdd->sec(fdd, fdc.s.media, track, sc); |
| if (secinfo) { | if (secinfo) { |
| nextclock = LOW16(secinfo); | nextclock = LOW16(secinfo); |
| Line 208 static REG8 type2cmd(REG8 sc) { | Line 247 static REG8 type2cmd(REG8 sc) { |
| if (nextclock < 0) { | if (nextclock < 0) { |
| nextclock += fdc.s.loopclock; | nextclock += fdc.s.loopclock; |
| } | } |
| TRACEOUT(("wait clock -> %d [%d/%d]", nextclock, | // TRACEOUT(("wait clock -> %d [%d/%d]", nextclock, |
| LOW16(secinfo), LOW16(secinfo >> 16))); | // LOW16(secinfo), LOW16(secinfo >> 16))); |
| clock += nextclock; | clock += nextclock; |
| } | } |
| setbusy(max(clock, 500)); | |
| #else | |
| setbusy(500); | |
| #endif | #endif |
| setbusy(max(clock, 500)); | |
| return(stat); | return(stat); |
| } | } |
| Line 240 static REG8 crccmd(void) { | Line 277 static REG8 crccmd(void) { |
| track = (fdc.s.c << 1) + fdc.s.h; | track = (fdc.s.c << 1) + fdc.s.h; |
| fdd = fddfile + fdc.s.drv; | fdd = fddfile + fdc.s.drv; |
| // TRACEOUT(("fdd->crc %d %d %d", fdc.s.drv, track, fdc.s.crcnum)); | |
| stat = fdd->crc(fdd, fdc.s.media, track, fdc.s.crcnum, fdc.s.buffer); | stat = fdd->crc(fdd, fdc.s.media, track, fdc.s.crcnum, fdc.s.buffer); |
| if (stat & FDDSTAT_RECNFND) { | if (stat & FDDSTAT_RECNFND) { |
| fdc.s.crcnum = 0; | fdc.s.crcnum = 0; |
| Line 249 static REG8 crccmd(void) { | Line 287 static REG8 crccmd(void) { |
| fdc.s.bufdir = FDCDIR_IN; | fdc.s.bufdir = FDCDIR_IN; |
| fdc.s.bufsize = 6; | fdc.s.bufsize = 6; |
| fdc.s.rreg = fdc.s.buffer[0]; | fdc.s.rreg = fdc.s.buffer[0]; |
| fdc.s.crcnum++; | |
| } | } |
| else { | else { |
| fdc.s.bufdir = FDCDIR_NONE; | fdc.s.bufdir = FDCDIR_NONE; |
| Line 310 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 349 void IOOUTCALL fdc_o(UINT port, REG8 val |
| fdc.s.cmd = value; | fdc.s.cmd = value; |
| cmd = (REG8)(value >> 4); | cmd = (REG8)(value >> 4); |
| fdc.s.type = fdctype[cmd]; | fdc.s.type = fdctype[cmd]; |
| TRACEOUT(("fdc cmd: %.2x", value)); | // TRACEOUT(("fdc cmd: %.2x", value)); |
| if (fdc.s.bufwrite) { | if (fdc.s.bufwrite) { |
| fdc.s.stat = type2flash(); | fdc.s.stat = type2flash(); |
| } | } |
| Line 322 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 361 void IOOUTCALL fdc_o(UINT port, REG8 val |
| setbusy(20); | setbusy(20); |
| switch(cmd) { | switch(cmd) { |
| case 0x00: // リストア | case 0x00: // リストア |
| // if (value & 8) { // LAYDOCK | |
| // setbusy(0); | |
| // } | |
| fdc.s.motor = 0x80; // モーターOn? | fdc.s.motor = 0x80; // モーターOn? |
| fdc.s.c = 0; | fdc.s.c = 0; |
| fdc.s.step = 1; | fdc.s.step = 1; |
| Line 387 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 423 void IOOUTCALL fdc_o(UINT port, REG8 val |
| case 0x0d: // フォースインタラプト | case 0x0d: // フォースインタラプト |
| setbusy(0); // 必要ない? | setbusy(0); // 必要ない? |
| // fdc.s.skip = 0; // 000330 | // fdc.s.skip = 0; // 000330 |
| fdc.s.stat = 0; | |
| dmac_sendready(FALSE); | dmac_sendready(FALSE); |
| break; | break; |
| Line 404 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 441 void IOOUTCALL fdc_o(UINT port, REG8 val |
| break; | break; |
| case 1: // トラック | case 1: // トラック |
| fdc.s.c = value; | fdc.s.creg = value; |
| break; | break; |
| case 2: // セクタ | case 2: // セクタ |
| Line 436 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 473 void IOOUTCALL fdc_o(UINT port, REG8 val |
| fdc.s.r = 0; // SACOM TELENET | fdc.s.r = 0; // SACOM TELENET |
| fdc.s.rreg = 0; | fdc.s.rreg = 0; |
| } | } |
| #if defined(SUPPORT_MOTORRISEUP) | |
| setmotor(value); | setmotor(value); |
| #endif | |
| break; | break; |
| } | } |
| } | } |
| Line 482 REG8 IOINPCALL fdc_i(UINT port) { | Line 521 REG8 IOINPCALL fdc_i(UINT port) { |
| if (fdc.s.motor) { | if (fdc.s.motor) { |
| if (fdc.s.bufdir == FDCDIR_IN) { | if (fdc.s.bufdir == FDCDIR_IN) { |
| fdc.s.data = fdc.s.buffer[fdc.s.bufpos]; | fdc.s.data = fdc.s.buffer[fdc.s.bufpos]; |
| // TRACEOUT(("read %.2x %.2x [%.4x]", fdc.s.data, fdc.s.bufpos, Z80_PC)); | // TRACEOUT(("read %.2x - %.2x [%.4x]", fdc.s.bufpos, fdc.s.data, Z80_PC)); |
| bufposinc(); | bufposinc(); |
| } | } |
| } | } |