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| version 1.6, 2004/08/10 10:41:53 | version 1.7, 2004/08/11 12:08:16 |
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| Line 3 | Line 3 |
| #include "z80core.h" | #include "z80core.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "nevent.h" | |
| #include "fddfile.h" | #include "fddfile.h" |
| #include "fdd_2d.h" | #include "fdd_2d.h" |
| #include "fdd_d88.h" | #include "fdd_d88.h" |
| Line 12 | Line 13 |
| static const UINT8 fdctype[] = {1,1,1,1,1,1,1,1,2,2,2,2,3,4,3,3}; | static const UINT8 fdctype[] = {1,1,1,1,1,1,1,1,2,2,2,2,3,4,3,3}; |
| static void setbusy(UINT clock) { | void nvitem_fdcbusy(UINT id) { |
| fdc.s.busystart = h_cntbase + h_cnt; | fdc.s.busy = FALSE; |
| fdc.s.busyclock = clock; | if (fdc.s.bufdir) { |
| TRACEOUT(("dma ready!")); | |
| dma.DMA_REDY = 0; | |
| } | |
| } | } |
| REG8 fdcisbusy(void) { | static void setbusy(UINT clock) { |
| UINT clock; | |
| if (fdc.s.busyclock) { | fdc.s.busy = TRUE; |
| clock = h_cntbase + h_cnt; | nevent_set(NEVENT_FDC, clock, nvitem_fdcbusy, NEVENT_ABSOLUTE); |
| if ((clock - fdc.s.busystart) < fdc.s.busyclock) { | |
| return(0x01); | |
| } | |
| fdc.s.busyclock = 0; | |
| if ((fdc.s.type == 2) || (fdc.s.cmd == 0x0c) || (fdc.s.cmd == 0x0e)) { | |
| if (fdc.s.bufpos < fdc.s.bufsize) { | |
| TRACEOUT(("dma ready!")); | |
| dma.DMA_REDY = 0; | |
| } | |
| } | |
| } | |
| return(0x00); | |
| } | } |
| static REG8 getstat(void) { | static REG8 getstat(void) { |
| Line 119 static REG8 type2cmd(REG8 sc) { | Line 109 static REG8 type2cmd(REG8 sc) { |
| } | } |
| size = sizeof(fdc.s.buffer); | size = sizeof(fdc.s.buffer); |
| fdd = fddfile + fdc.s.drv; | fdd = fddfile + fdc.s.drv; |
| TRACEOUT(("read %.2x %d %d", fdc.s.drv, track, sc)); | |
| stat = fdd->read(fdd, fdc.s.media, track, sc, p, &size); | stat = fdd->read(fdd, fdc.s.media, track, sc, p, &size); |
| if (stat & FDDSTAT_RECNFND) { | if (stat & FDDSTAT_RECNFND) { |
| size = 0; | size = 0; |
| Line 186 static void bufposinc(void) { | Line 177 static void bufposinc(void) { |
| BRESULT r; | BRESULT r; |
| REG8 stat; | REG8 stat; |
| if (fdcisbusy()) { | if (fdc.s.busy) { |
| return; | return; |
| } | } |
| fdc.s.bufpos++; | fdc.s.bufpos++; |
| Line 240 void IOOUTCALL fdc_o(UINT port, REG8 val | Line 231 void IOOUTCALL fdc_o(UINT port, REG8 val |
| if (fdc.s.bufwrite) { | if (fdc.s.bufwrite) { |
| fdc.s.stat = type2flash(); | fdc.s.stat = type2flash(); |
| } | } |
| fdc.s.bufdir = FDCDIR_NONE; | |
| setbusy(20); | setbusy(20); |
| switch(cmd) { | switch(cmd) { |
| case 0x00: // リストア | case 0x00: // リストア |
| Line 419 static short last_off; | Line 411 static short last_off; |
| } | } |
| switch(port) { | switch(port) { |
| case 0x8: // ステータス | case 0x8: // ステータス |
| ret = fdcisbusy(); | ret = fdc.s.busy; |
| if (ret) { | if (ret) { |
| return(ret); | return(ret); |
| } | } |