--- xmil/io/fdc.c 2004/08/14 12:16:17 1.15 +++ xmil/io/fdc.c 2004/08/15 17:51:53 1.18 @@ -35,6 +35,7 @@ static void setbusy(SINT32 clock) { } } +#if defined(SUPPORT_MOTORRISEUP) static void setmotor(REG8 drvcmd) { UINT drv; @@ -80,6 +81,25 @@ void fdc_callback(void) { } } +static SINT32 motorwait(REG8 drv) { + + SINT32 curclock; + SINT32 nextclock; + + if (fdc.s.motorevent[drv] == FDCMOTOR_STARTING) { + curclock = CPU_CLOCK + CPU_BASECLOCK - CPU_REMCLOCK; + curclock -= fdc.s.motorclock[drv]; + if (curclock < (SINT32)pccore.realclock) { + nextclock = pccore.realclock - curclock; +// TRACEOUT(("motor starting busy %d", nextclock)); + return(nextclock); + } + } + return(0); +} +#endif + + static REG8 getstat(void) { FDDFILE fdd; @@ -149,8 +169,8 @@ static REG8 type2cmd(REG8 sc) { FDDFILE fdd; UINT size; REG8 stat; -#if defined(SUPPORT_DISKEXT) SINT32 clock; +#if defined(SUPPORT_DISKEXT) SINT32 curclock; SINT32 nextclock; UINT32 secinfo; @@ -167,7 +187,7 @@ static REG8 type2cmd(REG8 sc) { } size = sizeof(fdc.s.buffer); fdd = fddfile + fdc.s.drv; - TRACEOUT(("read %.2x %d %d", fdc.s.drv, track, sc)); +// TRACEOUT(("read %.2x %d %d", fdc.s.drv, track, sc)); stat = fdd->read(fdd, fdc.s.media, track, sc, p, &size); if (stat & FDDSTAT_RECNFND) { size = 0; @@ -190,18 +210,11 @@ static REG8 type2cmd(REG8 sc) { fdc.s.bufsize = size; fdc.s.curtime = 0; -#if defined(SUPPORT_DISKEXT) - // ウェイト値を計算 clock = 0; - if (fdc.s.motorevent[fdc.s.drv] == FDCMOTOR_STARTING) { - curclock = CPU_CLOCK + CPU_BASECLOCK - CPU_REMCLOCK; - curclock -= fdc.s.motorclock[fdc.s.drv]; - if (curclock < (SINT32)pccore.realclock) { - nextclock = pccore.realclock - curclock; - TRACEOUT(("motor starting busy %d", nextclock)); - clock += nextclock; - } - } +#if defined(SUPPORT_MOTORRISEUP) + clock += motorwait(fdc.s.drv); +#endif +#if defined(SUPPORT_DISKEXT) secinfo = fdd->sec(fdd, fdc.s.media, track, sc); if (secinfo) { nextclock = LOW16(secinfo); @@ -212,14 +225,12 @@ static REG8 type2cmd(REG8 sc) { if (nextclock < 0) { nextclock += fdc.s.loopclock; } - TRACEOUT(("wait clock -> %d [%d/%d]", nextclock, - LOW16(secinfo), LOW16(secinfo >> 16))); +// TRACEOUT(("wait clock -> %d [%d/%d]", nextclock, +// LOW16(secinfo), LOW16(secinfo >> 16))); clock += nextclock; } - setbusy(max(clock, 500)); -#else - setbusy(500); #endif + setbusy(max(clock, 500)); return(stat); } @@ -244,7 +255,7 @@ static REG8 crccmd(void) { track = (fdc.s.c << 1) + fdc.s.h; fdd = fddfile + fdc.s.drv; -TRACEOUT(("fdd->crc %d %d %d", fdc.s.drv, track, fdc.s.crcnum)); +// TRACEOUT(("fdd->crc %d %d %d", fdc.s.drv, track, fdc.s.crcnum)); stat = fdd->crc(fdd, fdc.s.media, track, fdc.s.crcnum, fdc.s.buffer); if (stat & FDDSTAT_RECNFND) { fdc.s.crcnum = 0; @@ -316,7 +327,7 @@ void IOOUTCALL fdc_o(UINT port, REG8 val fdc.s.cmd = value; cmd = (REG8)(value >> 4); fdc.s.type = fdctype[cmd]; - TRACEOUT(("fdc cmd: %.2x", value)); +// TRACEOUT(("fdc cmd: %.2x", value)); if (fdc.s.bufwrite) { fdc.s.stat = type2flash(); } @@ -440,7 +451,9 @@ void IOOUTCALL fdc_o(UINT port, REG8 val fdc.s.r = 0; // SACOM TELENET fdc.s.rreg = 0; } +#if defined(SUPPORT_MOTORRISEUP) setmotor(value); +#endif break; } } @@ -473,7 +486,7 @@ REG8 IOINPCALL fdc_i(UINT port) { if (!(ret & 0x02)) { dmac_sendready(FALSE); } - TRACEOUT(("ret->%.2x", ret)); +// TRACEOUT(("ret->%.2x", ret)); return(ret); case 1: // トラック @@ -486,7 +499,7 @@ REG8 IOINPCALL fdc_i(UINT port) { if (fdc.s.motor) { if (fdc.s.bufdir == FDCDIR_IN) { fdc.s.data = fdc.s.buffer[fdc.s.bufpos]; -TRACEOUT(("read %.2x - %.2x [%.4x]", fdc.s.bufpos, fdc.s.data, Z80_PC)); +// TRACEOUT(("read %.2x - %.2x [%.4x]", fdc.s.bufpos, fdc.s.data, Z80_PC)); bufposinc(); } }