|
|
| version 1.2, 2004/08/08 17:45:52 | version 1.6, 2008/06/02 20:07:31 |
|---|---|
| Line 1 | Line 1 |
| #include "compiler.h" | #include "compiler.h" |
| #include "dosio.h" | |
| #include "z80core.h" | #include "z80core.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "defipl.res" | |
| UINT8 biosmem[0x8000]; | |
| #if defined(SUPPORT_BANKMEM) | |
| UINT8 bankmem[16][0x8000]; | |
| #endif | |
| void memio_update(void) { | void memio_update(void) { |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| if (memio.ems & 0x10) { | if (iocore.s.bankmem & 0x10) { |
| #endif | #endif |
| if (!memio.ram) { | if (!(iocore.s.ppib & 0x10)) { |
| RAM0r = mBIOS; | z80core.e.memread = biosmem; |
| RAM0w = mMAIN; | |
| } | } |
| else { | else { |
| RAM0r = RAM0w = mMAIN; | z80core.e.memread = mainmem; |
| } | } |
| #if defined(SUPPORT_EMS) | z80core.e.memwrite = mainmem; |
| #if defined(SUPPORT_BANKMEM) | |
| } | } |
| else { | else { |
| RAM0r = RAM0w = mBANK[memio.ems & 15]; | z80core.e.memread = bankmem[iocore.s.bankmem & 15]; |
| z80core.e.memwrite = bankmem[iocore.s.bankmem & 15]; | |
| } | } |
| #endif | #endif |
| } | } |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| void IOOUTCALL memio_ems_o(UINT port, REG8 dat) { | void IOOUTCALL memio_bank_o(UINT port, REG8 dat) { |
| memio.ems = dat; | iocore.s.bankmem = dat; |
| memio_update(); | memio_update(); |
| (void)port; | (void)port; |
| } | } |
| REG8 IOINPCALL memio_ems_i(UINT port) { | REG8 IOINPCALL memio_bank_i(UINT port) { |
| (void)port; | (void)port; |
| return(memio.ems); | return(iocore.s.bankmem); |
| } | } |
| #endif | #endif |
| void IOOUTCALL memio_rom(UINT port, REG8 dat) { | void IOOUTCALL memio_rom(UINT port, REG8 dat) { |
| memio.ram = 0x00; | iocore.s.ppib &= ~0x10; |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| if (memio.ems & 0x10) { | if (iocore.s.bankmem & 0x10) { |
| #endif | #endif |
| RAM0r = mBIOS; | z80core.e.memread = biosmem; |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| } | } |
| #endif | #endif |
| (void)port; | (void)port; |
| Line 55 void IOOUTCALL memio_rom(UINT port, REG8 | Line 64 void IOOUTCALL memio_rom(UINT port, REG8 |
| void IOOUTCALL memio_ram(UINT port, REG8 dat) { | void IOOUTCALL memio_ram(UINT port, REG8 dat) { |
| memio.ram = 0x10; | iocore.s.ppib |= 0x10; |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| if (memio.ems & 0x10) { | if (iocore.s.bankmem & 0x10) { |
| #endif | #endif |
| RAM0r = mMAIN; | z80core.e.memread = mainmem; |
| #if defined(SUPPORT_EMS) | #if defined(SUPPORT_BANKMEM) |
| } | } |
| #endif | #endif |
| (void)port; | (void)port; |
| Line 68 void IOOUTCALL memio_ram(UINT port, REG8 | Line 77 void IOOUTCALL memio_ram(UINT port, REG8 |
| } | } |
| // ---- | /* ---- */ |
| static const OEMCHAR iplromx1[] = OEMTEXT("IPLROM.X1"); | |
| static const OEMCHAR iplromx1t[] = OEMTEXT("IPLROM.X1T"); | |
| void memio_reset(void) { | void memio_reset(void) { |
| memio.ram = 0x00; | const OEMCHAR *iplfile; |
| #if defined(SUPPORT_EMS) | UINT iplsize; |
| memio.ems = 0x78; | FILEH fh; |
| ZeroMemory(biosmem, 0x8000); | |
| CopyMemory(biosmem, defaultiplrom, sizeof(defaultiplrom)); | |
| if (pccore.ROM_TYPE >= 1) { | |
| if (pccore.ROM_TYPE >= 2) { | |
| iplfile = iplromx1t; | |
| iplsize = 0x8000; | |
| } | |
| else { | |
| iplfile = iplromx1; | |
| iplsize = 0x8000; | |
| } | |
| fh = file_open_rb_c(iplfile); | |
| if (fh != FILEH_INVALID) { | |
| file_read(fh, biosmem, iplsize); | |
| file_close(fh); | |
| } | |
| } | |
| #if defined(SUPPORT_BANKMEM) | |
| iocore.s.bankmem = 0x78; | |
| #endif | #endif |
| memio_update(); | memio_update(); |
| } | } |