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| version 1.9, 2004/08/13 06:49:31 | version 1.15, 2008/06/02 20:07:31 |
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| Line 2 | Line 2 |
| #include "z80core.h" | #include "z80core.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "nevent.h" | |
| #include "vram.h" | #include "vram.h" |
| #include "makescrn.h" | |
| #include "font.h" | #include "font.h" |
| static void waithsync(void) { | |
| SINT32 clock; | |
| SINT32 h; | |
| clock = (CPU_CLOCKCOUNT - iocore.e.framestartclock) << 8; | |
| h = clock % crtc.e.rasterclock8; | |
| h = crtc.e.rasterdisp8 - h; | |
| if (h < 0) { | |
| h += crtc.e.rasterclock8; | |
| } | |
| CPU_REMCLOCK -= (h >> 8); | |
| } | |
| static UINT pcg_offset(void) { | static UINT pcg_offset(void) { |
| if (tram[TRAM_ATR + 0x07ff] & 0x20) { | if (TRAM_ATR(0x07ff) & 0x20) { |
| return(0x7ff); | return(0x7ff); |
| } | } |
| if (tram[TRAM_ATR + 0x03ff] & 0x20) { | if (TRAM_ATR(0x03ff) & 0x20) { |
| return(0x3ff); | return(0x3ff); |
| } | } |
| if (tram[TRAM_ATR + 0x05ff] & 0x20) { | if (TRAM_ATR(0x05ff) & 0x20) { |
| return(0x5ff); | return(0x5ff); |
| } | } |
| if (tram[TRAM_ATR + 0x01ff] & 0x20) { | if (TRAM_ATR(0x01ff) & 0x20) { |
| return(0x1ff); | return(0x1ff); |
| } | } |
| return(0x7ff); | return(0x7ff); |
| Line 26 static UINT pcg_offset(void) { | Line 41 static UINT pcg_offset(void) { |
| static UINT knj_offset(void) { | static UINT knj_offset(void) { |
| if (!(tram[TRAM_ATR + 0x07ff] & 0x20)) { | if (!(TRAM_ATR(0x07ff) & 0x20)) { |
| return(0x7ff); | return(0x7ff); |
| } | } |
| if (!(tram[TRAM_ATR + 0x03ff] & 0x20)) { | if (!(TRAM_ATR(0x03ff) & 0x20)) { |
| return(0x3ff); | return(0x3ff); |
| } | } |
| if (!(tram[TRAM_ATR + 0x05ff] & 0x20)) { | if (!(TRAM_ATR(0x05ff) & 0x20)) { |
| return(0x5ff); | return(0x5ff); |
| } | } |
| if (!(tram[TRAM_ATR + 0x01ff] & 0x20)) { | if (!(TRAM_ATR(0x01ff) & 0x20)) { |
| return(0x1ff); | return(0x1ff); |
| } | } |
| return(0x7ff); | return(0x7ff); |
| Line 48 static UINT nowsyncoffset(UINT *line) { | Line 63 static UINT nowsyncoffset(UINT *line) { |
| UINT v; | UINT v; |
| UINT ret; | UINT ret; |
| clock = nevent_getwork(NEVENT_FRAMES); | clock = (CPU_CLOCKCOUNT - iocore.e.framestartclock) << 8; |
| if (corestat.vsync) { | v = clock / crtc.e.rasterclock8; |
| clock += corestat.dispclock; | h = clock - (v * crtc.e.rasterclock8); |
| if (crtc.s.SCRN_BITS & SCRN_24KHZ) { | |
| v = v >> 1; | |
| } | } |
| v = clock / RASTER_CLOCK; | |
| h = clock - (v * RASTER_CLOCK); | |
| ret = v / crtc.e.fonty; | ret = v / crtc.e.fonty; |
| *line = (v - (ret * crtc.e.fonty)) & 7; | *line = (v - (ret * crtc.e.fonty)) & 7; |
| ret = (ret * crtc.s.reg[CRTCREG_HDISP]) + crtc.e.pos; | ret = (ret * crtc.s.reg[CRTCREG_HDISP]) + crtc.e.pos; |
| ret += (h * crtc.s.reg[CRTCREG_HDISP]) / RASTER_CLOCK; | ret += (h * crtc.s.reg[CRTCREG_HDISP]) / crtc.e.rasterclock8; |
| if (ret >= 0x0800) { | if (ret >= 0x0800) { |
| ret = 0x07ff; // オーバーフロー | ret = 0x07ff; /* オーバーフロー */ |
| } | } |
| return(ret); // まさに表示しようとしている TXT-RAMアドレス | return(ret); /* まさに表示しようとしている TXT-RAMアドレス */ |
| } | } |
| Line 72 void IOOUTCALL pcg_o(UINT port, REG8 val | Line 87 void IOOUTCALL pcg_o(UINT port, REG8 val |
| UINT line; | UINT line; |
| if (crtc.s.SCRN_BITS & SCRN_PCGMODE) { | if (crtc.s.SCRN_BITS & SCRN_PCGMODE) { |
| waithsync(); | |
| off = pcg_offset(); | off = pcg_offset(); |
| chr = tram[TRAM_ANK + off]; | chr = TRAM_ANK(off); |
| if (tram[TRAM_KNJ + off] & 0x90) { | if (TRAM_KNJ(off) & 0x90) { |
| chr = chr & (~1); | chr = chr & (~1); |
| line = port & 15; | line = port & 15; |
| } | } |
| Line 84 void IOOUTCALL pcg_o(UINT port, REG8 val | Line 100 void IOOUTCALL pcg_o(UINT port, REG8 val |
| } | } |
| else { | else { |
| off = nowsyncoffset(&line); | off = nowsyncoffset(&line); |
| chr = tram[TRAM_ANK + off]; | chr = TRAM_ANK(off); |
| } | } |
| chr += (port & 0x0300) - 0x100; | chr += (port & 0x0300) - 0x100; |
| pcg.d[(chr << 3) + line] = value; | if (pcg.d[(chr << 3) + line] != value) { |
| pcg.d[(chr << 3) + line] = value; | |
| crtc.e.scrnallflash = TRUE; | |
| } | |
| } | } |
| REG8 IOINPCALL pcg_i(UINT port) { | REG8 IOINPCALL pcg_i(UINT port) { |
| BRESULT ank; | UINT upper; |
| UINT line; | UINT line; |
| UINT off; | UINT off; |
| UINT chr; | UINT chr; |
| UINT knj; | UINT knj; |
| UINT addr; | UINT addr; |
| ank = ((port & 0xff00) == 0x1400); | upper = port & 0x0300; |
| if (crtc.s.SCRN_BITS & SCRN_PCGMODE) { | if (crtc.s.SCRN_BITS & SCRN_PCGMODE) { |
| waithsync(); | |
| line = port & 0x0f; | line = port & 0x0f; |
| if (ank) { | if (!upper) { |
| off = knj_offset(); | off = knj_offset(); |
| chr = tram[TRAM_ANK + off]; | chr = TRAM_ANK(off); |
| knj = tram[TRAM_KNJ + off]; | knj = TRAM_KNJ(off); |
| if (knj & 0x80) { | if (knj & 0x80) { |
| addr = ((((knj & 0x1f) << 8) + chr) << 4) + line; | addr = ((((knj & 0x1f) << 8) + chr) << 4) + line; |
| if (knj & 0x40) { | if (knj & 0x40) { |
| Line 122 REG8 IOINPCALL pcg_i(UINT port) { | Line 142 REG8 IOINPCALL pcg_i(UINT port) { |
| } | } |
| else { | else { |
| off = pcg_offset(); | off = pcg_offset(); |
| chr = tram[TRAM_ANK + off]; | chr = TRAM_ANK(off); |
| if (tram[TRAM_KNJ + off] & 0x90) { | if (TRAM_KNJ(off) & 0x90) { |
| chr = chr & (~1); | chr = chr & (~1); |
| } | } |
| else { | else { |
| Line 133 REG8 IOINPCALL pcg_i(UINT port) { | Line 153 REG8 IOINPCALL pcg_i(UINT port) { |
| } | } |
| else { | else { |
| off = nowsyncoffset(&line); | off = nowsyncoffset(&line); |
| chr = tram[TRAM_ANK + off]; | chr = TRAM_ANK(off); |
| } | } |
| if (ank) { | if (!upper) { |
| return(font_ank[(chr << 3) + line]); | return(font_ank[(chr << 3) + line]); |
| } | } |
| else { | else { |
| chr += (port & 0x0300) - 0x100; | chr += upper - 0x100; |
| return(pcg.d[(chr << 3) + line]); | return(pcg.d[(chr << 3) + line]); |
| } | } |
| } | } |
| // ---- | /* initialize & reset */ |
| void pcg_initialize(void) { | void pcg_initialize(void) { |