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| version 1.1, 2004/08/01 05:31:30 | version 1.2, 2004/08/02 11:48:14 |
|---|---|
| Line 97 REG8 IOINPCALL ppi_i(UINT port) { | Line 97 REG8 IOINPCALL ppi_i(UINT port) { |
| if (!pccore.ROM_SW) { | if (!pccore.ROM_SW) { |
| ppi.PORT_B |= 0x10; // 1:RAM | ppi.PORT_B |= 0x10; // 1:RAM |
| } | } |
| #if 1 | |
| if (!(v_cnt < crtc.CRT_VS)) { | if (!(v_cnt < crtc.CRT_VS)) { |
| ppi.PORT_B |= 0x04; // V-SYNC | ppi.PORT_B |= 0x04; // V-SYNC |
| } | } |
| #else // ラプラステスト…VYSNCが長すぎるらしい | |
| if (v_cnt == crtc.CRT_VS) { | |
| ppi.PORT_B |= 0x04; | |
| } | |
| #endif | |
| if (crtc.TXT_XL == 40) { | if (crtc.TXT_XL == 40) { |
| ppi.PORT_C |= 0x40; | ppi.PORT_C |= 0x40; |
| } | } |