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| version 1.14, 2004/08/13 02:16:33 | version 1.16, 2004/08/17 14:46:37 |
|---|---|
| Line 41 static REG8 getportb(void) { | Line 41 static REG8 getportb(void) { |
| static void setportc(REG8 dat) { | static void setportc(REG8 dat) { |
| REG8 oldc; | REG8 modify; |
| UINT8 xl; | |
| oldc = ppi.portc; | modify = ppi.portc ^ dat; |
| if (crtc.s.reg[CRTCREG_HDISP] == 40) { | |
| oldc |= 0x40; | |
| } | |
| else { | |
| oldc &= ~0x40; | |
| } | |
| ppi.portc = dat; | ppi.portc = dat; |
| // cmt_write((REG8)(dat & 1)); | // cmt_write((REG8)(dat & 1)); |
| if ((oldc & 0x20) && (!(dat & 0x20))) { | if ((modify & 0x20) && (!(dat & 0x20))) { |
| iocore.s.mode = 1; | iocore.s.mode = 1; |
| } | } |
| if (modify & 0x40) { | |
| crtc_setwidth((REG8)(dat & 0x40)); | |
| } | |
| #if 0 | |
| xl = ((dat & 0x40)?40:80); | xl = ((dat & 0x40)?40:80); |
| if (crtc.s.reg[CRTCREG_HDISP] != xl) { | if (crtc.s.reg[CRTCREG_HDISP] != xl) { |
| crtc.s.reg[CRTCREG_HDISP] = (UINT8)xl; | crtc.s.reg[CRTCREG_HDISP] = (UINT8)xl; |
| crtc_bankupdate(); | crtc_bankupdate(); |
| scrnallflash = 1; | scrnallflash = 1; |
| } | } |
| #endif | |
| } | } |
| Line 119 REG8 IOINPCALL ppi_i(UINT port) { | Line 116 REG8 IOINPCALL ppi_i(UINT port) { |
| return(getportb()); | return(getportb()); |
| case 2: | case 2: |
| #if 1 | // mode? |
| if (crtc.s.reg[CRTCREG_HDISP] == 40) { | |
| ppi.portc |= 0x40; | |
| } | |
| else { | |
| ppi.portc &= ~0x40; | |
| } | |
| #endif | |
| return(ppi.portc); | return(ppi.portc); |
| case 3: | case 3: |