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version 1.4, 2004/08/04 17:09:25
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version 1.7, 2004/08/08 15:14:08
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Line 1
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Line 1
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| #include "compiler.h" |
#include "compiler.h" |
| #include "pccore.h" |
#include "pccore.h" |
| #include "iocore.h" |
#include "iocore.h" |
| #include "draw.h" |
#include "makescrn.h" |
| |
|
| |
|
| // ---- 8255 PPIˇÁ |
// ---- 8255 PPIˇÁ |
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Line 66 void IOOUTCALL ppi_o(UINT port, REG8 val
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Line 66 void IOOUTCALL ppi_o(UINT port, REG8 val
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| |
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| // cmt_write(ppi.PORT_C & 1); |
// cmt_write(ppi.PORT_C & 1); |
| if ((bak_c & 0x20) && (!(ppi.PORT_C & 0x20))) { |
if ((bak_c & 0x20) && (!(ppi.PORT_C & 0x20))) { |
| ppi.IO_MODE = 1; |
iocore.s.mode = 1; |
| } |
} |
| xl = ((ppi.PORT_C & 0x40)?40:80); |
xl = ((ppi.PORT_C & 0x40)?40:80); |
| if (crtc.s.TXT_XL != xl) { |
if (crtc.s.TXT_XL != xl) { |
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Line 91 REG8 IOINPCALL ppi_i(UINT port) {
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Line 91 REG8 IOINPCALL ppi_i(UINT port) {
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| if (subcpu.OBF) { |
if (subcpu.OBF) { |
| ppi.PORT_B |= 0x20; // 1:SUB-CPU Data empty |
ppi.PORT_B |= 0x20; // 1:SUB-CPU Data empty |
| } |
} |
| if (!pccore.ROM_SW) { |
if (memio.ram) { |
| ppi.PORT_B |= 0x10; // 1:RAM |
ppi.PORT_B |= 0x10; // 1:RAM |
| } |
} |
| #if 1 |
#if 1 |
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Line 134 void ppi_initialize(void) {
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Line 134 void ppi_initialize(void) {
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| ppi.PORT_B = 0xff; |
ppi.PORT_B = 0xff; |
| ppi.PORT_C = 0xff; |
ppi.PORT_C = 0xff; |
| ppi.MODE = 0; |
ppi.MODE = 0; |
| ppi.IO_MODE = 0; |
|
| } |
} |
| |
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| void ppi_reset(void) { |
void ppi_reset(void) { |
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Line 142 void ppi_reset(void) {
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Line 141 void ppi_reset(void) {
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| ppi.MODE = 0; |
ppi.MODE = 0; |
| ppi.PORT_A = 0; |
ppi.PORT_A = 0; |
| ppi.PORT_C |= 0x40; |
ppi.PORT_C |= 0x40; |
| ppi.IO_MODE = 0; |
|
| } |
} |
| |
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