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| version 1.6, 2004/08/07 07:19:56 | version 1.9, 2004/08/11 12:08:16 |
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| Line 66 void IOOUTCALL ppi_o(UINT port, REG8 val | Line 66 void IOOUTCALL ppi_o(UINT port, REG8 val |
| // cmt_write(ppi.PORT_C & 1); | // cmt_write(ppi.PORT_C & 1); |
| if ((bak_c & 0x20) && (!(ppi.PORT_C & 0x20))) { | if ((bak_c & 0x20) && (!(ppi.PORT_C & 0x20))) { |
| ppi.IO_MODE = 1; | iocore.s.mode = 1; |
| } | } |
| xl = ((ppi.PORT_C & 0x40)?40:80); | xl = ((ppi.PORT_C & 0x40)?40:80); |
| if (crtc.s.TXT_XL != xl) { | if (crtc.s.TXT_XL != xl) { |
| crtc.s.TXT_XL = (UINT8)xl; | crtc.s.TXT_XL = (UINT8)xl; |
| crtc.s.GRP_XL = xl << 3; | // crtc.s.GRP_XL = xl << 3; |
| vrambank_patch(); | vrambank_patch(); |
| scrnallflash = 1; | scrnallflash = 1; |
| } | } |
| Line 79 void IOOUTCALL ppi_o(UINT port, REG8 val | Line 79 void IOOUTCALL ppi_o(UINT port, REG8 val |
| REG8 IOINPCALL ppi_i(UINT port) { | REG8 IOINPCALL ppi_i(UINT port) { |
| UINT v; | |
| ppi.PORT_B = cmt_test(); // | cmt_read(); // THUNDER BALL | ppi.PORT_B = cmt_test(); // | cmt_read(); // THUNDER BALL |
| if (v_cnt < crtc.s.CRT_YL) { | v = pccore_getraster(NULL); |
| if (v < crtc.s.CRT_YL) { | |
| ppi.PORT_B |= 0x80; // 1:DISP | ppi.PORT_B |= 0x80; // 1:DISP |
| } | } |
| if (subcpu.IBF) { | if (subcpu.IBF) { |
| Line 95 REG8 IOINPCALL ppi_i(UINT port) { | Line 98 REG8 IOINPCALL ppi_i(UINT port) { |
| ppi.PORT_B |= 0x10; // 1:RAM | ppi.PORT_B |= 0x10; // 1:RAM |
| } | } |
| #if 1 | #if 1 |
| if (!(v_cnt < crtc.s.CRT_VS)) { | if (!(v < crtc.e.vs)) { |
| ppi.PORT_B |= 0x04; // V-SYNC | ppi.PORT_B |= 0x04; // V-SYNC |
| } | } |
| #else // ラプラステスト…VYSNCが長すぎるらしい | #else // ラプラステスト…VYSNCが長すぎるらしい |
| if (v_cnt == crtc.s.CRT_VS) { | if (v_cnt == crtc.e.vs) { |
| ppi.PORT_B |= 0x04; | ppi.PORT_B |= 0x04; |
| } | } |
| #endif | #endif |
| Line 134 void ppi_initialize(void) { | Line 137 void ppi_initialize(void) { |
| ppi.PORT_B = 0xff; | ppi.PORT_B = 0xff; |
| ppi.PORT_C = 0xff; | ppi.PORT_C = 0xff; |
| ppi.MODE = 0; | ppi.MODE = 0; |
| ppi.IO_MODE = 0; | |
| } | } |
| void ppi_reset(void) { | void ppi_reset(void) { |
| Line 142 void ppi_reset(void) { | Line 144 void ppi_reset(void) { |
| ppi.MODE = 0; | ppi.MODE = 0; |
| ppi.PORT_A = 0; | ppi.PORT_A = 0; |
| ppi.PORT_C |= 0x40; | ppi.PORT_C |= 0x40; |
| ppi.IO_MODE = 0; | |
| } | } |