--- xmil/io/ppi.c 2004/08/12 20:09:42 1.13 +++ xmil/io/ppi.c 2005/02/04 06:42:11 1.18 @@ -1,8 +1,7 @@ #include "compiler.h" +#include "z80core.h" #include "pccore.h" #include "iocore.h" -#include "nevent.h" -#include "makescrn.h" // ---- 8255 PPI〜 @@ -10,58 +9,58 @@ static REG8 getportb(void) { REG8 ret; + REG8 ppib; +#if defined(MAINFRAMES_OLD) SINT32 clock; +#endif - ret = cmt_test(); // | cmt_read(); // THUNDER BALL - - clock = nevent_getwork(NEVENT_FRAMES); - if (corestat.vsync) { - clock += corestat.dispclock; - } - if (clock < crtc.e.dispclock) { +// if (subcpu.IBF) { +// subcpu.IBF = 0; +// ret |= 0x40; // 1:SUB-CPU BUSY +// } +// if (subcpu.OBF) { +// ret |= 0x20; // 1:SUB-CPU Data empty +// } + + ppib = iocore.s.ppib; + ret = ppib; + +// ret |= cmt_test(); // THUNDER BALL +// /* -> */ ppib |= 0x01; + + iocore.s.ppib = (UINT8)((ppib & (~0x40)) | 0x01); + +// ret |= cmt_read(); + +#if defined(MAINFRAMES_OLD) + clock = CPU_CLOCKCOUNT - iocore.e.framestartclock; + if (clock < iocore.e.dispclock) { ret |= 0x80; // 1:DISP } - clock -= crtc.e.vsyncstart; - if ((clock >= 0) && (clock < crtc.e.vpulseclock)) { - ret |= 0x04; // 1:V-SYNC - } - if (subcpu.IBF) { - subcpu.IBF = 0; - ret |= 0x40; // 1:SUB-CPU BUSY - } - if (subcpu.OBF) { - ret |= 0x20; // 1:SUB-CPU Data empty - } - if (memio.ram) { - ret |= 0x10; // 1:RAM + // 実機の動きを見ると どうも 読み込んだらリセットされるようだ? + // 有効範囲が絞れるならそうすべき(VSYNCを取りこぼすソフトがある + clock -= iocore.e.vsyncstart; + if ((clock >= 0) && (clock < iocore.e.vpulseclock)) { + ret |= 0x04; // 1:V-SYNC } +#endif return(ret); } static void setportc(REG8 dat) { - REG8 oldc; - UINT8 xl; + REG8 modify; - oldc = ppi.portc; - if (crtc.s.reg[CRTCREG_HDISP] == 40) { - oldc |= 0x40; - } - else { - oldc &= ~0x40; - } + modify = ppi.portc ^ dat; ppi.portc = dat; - // cmt_write((REG8)(dat & 1)); - if ((oldc & 0x20) && (!(dat & 0x20))) { + if ((modify & 0x20) && (!(dat & 0x20))) { iocore.s.mode = 1; +// TRACEOUT(("iocore.s.mode = 1")); } - xl = ((dat & 0x40)?40:80); - if (crtc.s.reg[CRTCREG_HDISP] != xl) { - crtc.s.reg[CRTCREG_HDISP] = (UINT8)xl; - crtc_bankupdate(); - scrnallflash = 1; + if (modify & 0x40) { + crtc_setwidth((REG8)(dat & 0x40)); } } @@ -119,14 +118,7 @@ REG8 IOINPCALL ppi_i(UINT port) { return(getportb()); case 2: -#if 1 - if (crtc.s.reg[CRTCREG_HDISP] == 40) { - ppi.portc |= 0x40; - } - else { - ppi.portc &= ~0x40; - } -#endif + // mode? return(ppi.portc); case 3: @@ -143,7 +135,7 @@ void ppi_initialize(void) { ppi.porta = 0x00; ppi.portb = 0xff; ppi.portc = 0xff; - ppi.mode = 0x9b; + ppi.mode = 0x82; } void ppi_reset(void) {