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| version 1.14, 2004/08/08 06:59:21 | version 1.15, 2004/08/08 09:12:06 |
|---|---|
| Line 22 | Line 22 |
| const OEMCHAR xmilversion[] = OEMTEXT(XMILVER_CORE); | const OEMCHAR xmilversion[] = OEMTEXT(XMILVER_CORE); |
| XMILCFG xmilcfg = { 0, 0, 1, | XMILCFG xmilcfg = { 2, 0, 1, |
| 2, 0, 1, | 1, 0, 0, 0, |
| 22050, 1000, 0, 80, | 22050, 500, 0, 0, 80, |
| 0, 0, | 0, 0, 0, 0}; |
| 0, 0, | |
| 0, 0, 0, | |
| 1, 0}; | |
| PCCORE pccore = {250, 0, 1, 0}; | PCCORE pccore = {250, 0, 1, 0}; |
| CORESTAT corestat; | CORESTAT corestat; |
| Line 141 void pccore_initialize(void) { | Line 138 void pccore_initialize(void) { |
| crtc_initialize(); | crtc_initialize(); |
| pcg_initialize(); | pcg_initialize(); |
| ppi_initialize(); | ppi_initialize(); |
| // reset_x1(xmilcfg.ROM_TYPE, xmilcfg.SOUND_SW, xmilcfg.DIP_SW); | |
| // keystat_initialize(); | |
| // keystat_reset(); | |
| } | } |
| void pccore_reset(void) { | void pccore_reset(void) { |
| Line 220 void pccore_exec(BRESULT draw) { | Line 212 void pccore_exec(BRESULT draw) { |
| while(s_cnt < 266) { | while(s_cnt < 266) { |
| while(h_cnt < pccore.HSYNC_CLK) { | while(h_cnt < pccore.HSYNC_CLK) { |
| #if IPTRACE | #if defined(TRACE) && IPTRACE |
| treip[trpos & (IPTRACE - 1)] = Z80_PC; | treip[trpos & (IPTRACE - 1)] = Z80_PC; |
| trpos++; | trpos++; |
| #endif | #endif |