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| version 1.2, 2004/08/02 11:48:13 | version 1.7, 2004/08/04 17:09:25 |
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| Line 7 | Line 7 |
| #include "z80core.h" | #include "z80core.h" |
| #include "pccore.h" | #include "pccore.h" |
| #include "iocore.h" | #include "iocore.h" |
| #include "x1_io.h" | |
| #include "x1_crtc.h" | |
| #include "x1_vram.h" | |
| #include "x1_fdc.h" | |
| #include "draw.h" | #include "draw.h" |
| #include "sound.h" | #include "sound.h" |
| #include "sndctrl.h" | #include "sndctrl.h" |
| Line 39 const OEMCHAR xmilversion[] = OEMTEXT(XM | Line 35 const OEMCHAR xmilversion[] = OEMTEXT(XM |
| BYTE mMAIN[0x10000]; | BYTE mMAIN[0x10000]; |
| BYTE mBIOS[0x8000]; | BYTE mBIOS[0x8000]; |
| BYTE mBANK[16][0x8000]; | BYTE mBANK[16][0x8000]; |
| // BYTE KNJ_FNT[0x4bc00]; | |
| BYTE GRP_RAM[0x20000]; | |
| BYTE TXT_RAM[0x01800]; | |
| WORD v_cnt; | WORD v_cnt; |
| int s_cnt; | int s_cnt; |
| Line 62 void ipl_load(void) { | Line 55 void ipl_load(void) { |
| FILEH hdl; | FILEH hdl; |
| ZeroMemory(mBIOS, sizeof(mBIOS)); | ZeroMemory(mBIOS, sizeof(mBIOS)); |
| memcpy(mBIOS, DEFROM, sizeof(DEFROM)); | CopyMemory(mBIOS, DEFROM, sizeof(DEFROM)); |
| if (pccore.ROM_TYPE >= 2) { | if (pccore.ROM_TYPE >= 2) { |
| if ((hdl = file_open_c("IPLROM.X1T")) != FILEH_INVALID) { | if ((hdl = file_open_c(OEMTEXT("IPLROM.X1T"))) != FILEH_INVALID) { |
| file_read(hdl, mBIOS, 0x8000); | file_read(hdl, mBIOS, 0x8000); |
| file_close(hdl); | file_close(hdl); |
| } | } |
| } | } |
| else if (pccore.ROM_TYPE == 1) { | else if (pccore.ROM_TYPE == 1) { |
| if ((hdl = file_open_c("IPLROM.X1")) != FILEH_INVALID) { | if ((hdl = file_open_c(OEMTEXT("IPLROM.X1"))) != FILEH_INVALID) { |
| file_read(hdl, mBIOS, 0x8000); | file_read(hdl, mBIOS, 0x8000); |
| file_close(hdl); | file_close(hdl); |
| } | } |
| Line 124 BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ | Line 117 BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ |
| calendar_initialize(); | calendar_initialize(); |
| init_fdc(); | |
| subcpu_reset(); | |
| ppi_reset(); | |
| init_crtc(); | |
| init_vram(); | |
| cgrom_reset(); | cgrom_reset(); |
| cmt_reset(); | cmt_reset(); |
| crtc_reset(); | |
| ctc_reset(); | ctc_reset(); |
| dmac_reset(); | dmac_reset(); |
| fdc_reset(); | |
| pcg_reset(); | pcg_reset(); |
| ppi_reset(); | |
| sio_reset(); | sio_reset(); |
| sndboard_reset(); | sndboard_reset(); |
| subcpu_reset(); | |
| vramio_reset(); | |
| timing_reset(); | timing_reset(); |
| return(SUCCESS); | return(SUCCESS); |
| Line 274 extern BYTE disp_flashscreen; | Line 266 extern BYTE disp_flashscreen; |
| } | } |
| } | } |
| v_cnt++; | v_cnt++; |
| if (crtc.CRT_YL == v_cnt) { | if (crtc.s.CRT_YL == v_cnt) { |
| // TRACEOUT(("--->sync")); | // TRACEOUT(("--->sync")); |
| pcg.r.vsync = 1; | pcg.r.vsync = 1; |
| if (xmilcfg.DISPSYNC == 1) { | if (xmilcfg.DISPSYNC == 1) { |