|
|
| version 1.23, 2004/08/12 13:32:52 | version 1.28, 2004/08/13 01:35:59 |
|---|---|
| Line 24 | Line 24 |
| const OEMCHAR xmilversion[] = OEMTEXT(XMILVER_CORE); | const OEMCHAR xmilversion[] = OEMTEXT(XMILVER_CORE); |
| XMILCFG xmilcfg = { 2, 0, 1, | XMILCFG xmilcfg = { 2, 1, 0x03, |
| 1, 0, 0, 0, | 1, 0, 0, 0, |
| 22050, 500, 0, 0, 80, | 22050, 500, 0, 0, 80, |
| 0, 0, 0, 0}; | 0, 0, 0, 0}; |
| PCCORE pccore; | PCCORE pccore; |
| CORESTAT corestat; | CORESTAT corestat; |
| BYTE mMAIN[0x10000]; | UINT8 mMAIN[0x10000]; |
| BYTE mBIOS[0x8000]; | UINT8 mBIOS[0x8000]; |
| #if defined(SUPPORT_BANKMEM) | #if defined(SUPPORT_BANKMEM) |
| UINT8 mBANK[16][0x8000]; | UINT8 mBANK[16][0x8000]; |
| #endif | #endif |
| Line 97 void pccore_reset(void) { | Line 97 void pccore_reset(void) { |
| sndctrl_deinitialize(); | sndctrl_deinitialize(); |
| sndctrl_initialize(); | sndctrl_initialize(); |
| } | } |
| sound_reset(); | |
| pccore.baseclock = 2000000; | pccore.baseclock = 2000000; |
| pccore.multiple = 2; | pccore.multiple = 2; |
| Line 118 void pccore_reset(void) { | Line 116 void pccore_reset(void) { |
| scrnmng_setcolormode(FALSE); | scrnmng_setcolormode(FALSE); |
| } | } |
| sound_changeclock(); | |
| sysmng_cpureset(); | sysmng_cpureset(); |
| sound_changeclock(); | |
| sound_reset(); | |
| Z80_RESET(); | Z80_RESET(); |
| nevent_allreset(); | nevent_allreset(); |
| ievent_reset(); | ievent_reset(); |
| calendar_reset(); | |
| iocore_reset(); | iocore_reset(); |
| ipl_load(); | ipl_load(); |
| Line 131 void pccore_reset(void) { | Line 132 void pccore_reset(void) { |
| RAM0r = mBIOS; | RAM0r = mBIOS; |
| RAM0w = mMAIN; | RAM0w = mMAIN; |
| cgrom_reset(); | |
| cmt_reset(); | |
| crtc_reset(); | |
| ctc_reset(); | |
| dmac_reset(); | |
| fdc_reset(); | |
| memio_reset(); | |
| pcg_reset(); | |
| ppi_reset(); | |
| sio_reset(); | |
| sndboard_reset(); | |
| subcpu_reset(); | |
| vramio_reset(); | |
| calendar_initialize(); | |
| pal_reset(); | pal_reset(); |
| makescrn_reset(); | makescrn_reset(); |
| timing_reset(); | timing_reset(); |
| Line 188 void iptrace_out(void) { | Line 174 void iptrace_out(void) { |
| #endif | #endif |
| UINT pccore_getraster(UINT *h) { | void neitem_disp(UINT id) { |
| SINT32 work; | |
| UINT vl; | |
| work = nevent_getwork(NEVENT_FRAMES); | |
| vl = work / 250; | |
| if (h) { | |
| *h = work - (vl * 250); | |
| } | |
| if (corestat.vsync) { | |
| vl += corestat.vl; | |
| } | |
| return(vl); | |
| } | |
| void nvitem_vdisp(UINT id) { | |
| corestat.vsync = 1; | corestat.vsync = 1; |
| pcg.r.vsync = 1; | pcg.r.vsync = 1; |
| if (xmilcfg.DISPSYNC & 1) { | if (xmilcfg.DISPSYNC & 1) { |
| scrnupdate(); | scrnupdate(); |
| } | } |
| nevent_set(id, (corestat.tl - corestat.vl) * 250, | nevent_set(id, corestat.syncclock, neitem_vsync, NEVENT_RELATIVE); |
| nvitem_vsync, NEVENT_RELATIVE); | |
| } | } |
| void nvitem_vsync(UINT id) { | void neitem_vsync(UINT id) { |
| corestat.vsync = 2; | corestat.vsync = 2; |
| (void)id; | (void)id; |
| } | } |
| // ---- | |
| // #define SINGLESTEPONLY | // #define SINGLESTEPONLY |
| void pccore_exec(BRESULT draw) { | void pccore_exec(BRESULT draw) { |
| SINT32 frameclock; | |
| SINT32 dispclock; | |
| corestat.drawframe = draw; | corestat.drawframe = draw; |
| soundmng_sync(); | soundmng_sync(); |
| corestat.tl = 266 * pccore.multiple / 2; | frameclock = 266 * RASTER_CLOCK * pccore.multiple / 2; |
| corestat.vl = min(corestat.tl, crtc.e.dl); | dispclock = min(frameclock, crtc.e.dispclock); |
| corestat.dispclock = dispclock; | |
| corestat.syncclock = frameclock - dispclock; | |
| corestat.vsync = 0; | corestat.vsync = 0; |
| nevent_set(NEVENT_FRAMES, corestat.vl * 250, | nevent_set(NEVENT_FRAMES, dispclock, neitem_disp, NEVENT_RELATIVE); |
| nvitem_vdisp, NEVENT_RELATIVE); | |
| do { | do { |
| #if !defined(SINGLESTEPONLY) | #if !defined(SINGLESTEPONLY) |
| if (CPU_REMCLOCK > 0) { | if (CPU_REMCLOCK > 0) { |
| Line 241 void pccore_exec(BRESULT draw) { | Line 216 void pccore_exec(BRESULT draw) { |
| } | } |
| #else | #else |
| while(CPU_REMCLOCK > 0) { | while(CPU_REMCLOCK > 0) { |
| TRACEOUT(("%.4x", Z80_PC)); | // TRACEOUT(("%.4x", Z80_PC)); |
| #if defined(TRACE) && IPTRACE | #if defined(TRACE) && IPTRACE |
| treip[trpos & (IPTRACE - 1)] = Z80_PC; | treip[trpos & (IPTRACE - 1)] = Z80_PC; |
| trpos++; | trpos++; |
| Line 254 void pccore_exec(BRESULT draw) { | Line 229 void pccore_exec(BRESULT draw) { |
| } while(corestat.vsync < 2); | } while(corestat.vsync < 2); |
| scrnupdate(); | scrnupdate(); |
| calendar_inc(); | |
| sound_sync(); | sound_sync(); |
| fdc_callback(); | |
| } | } |