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| version 1.1, 2004/08/01 05:31:29 | version 1.6, 2004/08/04 15:18:25 |
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| Line 9 | Line 9 |
| #include "iocore.h" | #include "iocore.h" |
| #include "x1_io.h" | #include "x1_io.h" |
| #include "x1_crtc.h" | #include "x1_crtc.h" |
| #include "x1_vram.h" | |
| #include "x1_fdc.h" | |
| #include "draw.h" | #include "draw.h" |
| #include "sound.h" | #include "sound.h" |
| #include "sndctrl.h" | #include "sndctrl.h" |
| Line 39 const OEMCHAR xmilversion[] = OEMTEXT(XM | Line 37 const OEMCHAR xmilversion[] = OEMTEXT(XM |
| BYTE mMAIN[0x10000]; | BYTE mMAIN[0x10000]; |
| BYTE mBIOS[0x8000]; | BYTE mBIOS[0x8000]; |
| BYTE mBANK[16][0x8000]; | BYTE mBANK[16][0x8000]; |
| // BYTE KNJ_FNT[0x4bc00]; | |
| BYTE GRP_RAM[0x20000]; | |
| BYTE TXT_RAM[0x01800]; | |
| WORD v_cnt; | WORD v_cnt; |
| int s_cnt; | int s_cnt; |
| Line 62 void ipl_load(void) { | Line 57 void ipl_load(void) { |
| FILEH hdl; | FILEH hdl; |
| ZeroMemory(mBIOS, sizeof(mBIOS)); | ZeroMemory(mBIOS, sizeof(mBIOS)); |
| memcpy(mBIOS, DEFROM, sizeof(DEFROM)); | CopyMemory(mBIOS, DEFROM, sizeof(DEFROM)); |
| if (pccore.ROM_TYPE >= 2) { | if (pccore.ROM_TYPE >= 2) { |
| if ((hdl = file_open_c("IPLROM.X1T")) != FILEH_INVALID) { | if ((hdl = file_open_c(OEMTEXT("IPLROM.X1T"))) != FILEH_INVALID) { |
| file_read(hdl, mBIOS, 0x8000); | file_read(hdl, mBIOS, 0x8000); |
| file_close(hdl); | file_close(hdl); |
| } | } |
| } | } |
| else if (pccore.ROM_TYPE == 1) { | else if (pccore.ROM_TYPE == 1) { |
| if ((hdl = file_open_c("IPLROM.X1")) != FILEH_INVALID) { | if ((hdl = file_open_c(OEMTEXT("IPLROM.X1"))) != FILEH_INVALID) { |
| file_read(hdl, mBIOS, 0x8000); | file_read(hdl, mBIOS, 0x8000); |
| file_close(hdl); | file_close(hdl); |
| } | } |
| Line 124 BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ | Line 119 BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ |
| calendar_initialize(); | calendar_initialize(); |
| init_fdc(); | |
| subcpu_reset(); | subcpu_reset(); |
| ppi_reset(); | ppi_reset(); |
| init_crtc(); | init_crtc(); |
| init_vram(); | |
| cgrom_reset(); | cgrom_reset(); |
| cmt_reset(); | cmt_reset(); |
| ctc_reset(); | ctc_reset(); |
| dmac_reset(); | dmac_reset(); |
| fdc_reset(); | |
| pcg_reset(); | pcg_reset(); |
| sio_reset(); | sio_reset(); |
| sndboard_reset(); | sndboard_reset(); |
| vramio_reset(); | |
| timing_reset(); | timing_reset(); |
| return(SUCCESS); | return(SUCCESS); |
| Line 236 extern BYTE disp_flashscreen; | Line 231 extern BYTE disp_flashscreen; |
| s_cnt = 0; | s_cnt = 0; |
| xmilcfg.DISPSYNC &= 1; | xmilcfg.DISPSYNC &= 1; |
| inttiming = xmilcfg.CPU8MHz & 1; | inttiming = xmilcfg.CPU8MHz & 1; |
| // TRACEOUT(("*sync")); | |
| while(s_cnt < 266) { | while(s_cnt < 266) { |
| while(h_cnt < pccore.HSYNC_CLK) { | while(h_cnt < pccore.HSYNC_CLK) { |
| #if defined(TRACE) | |
| // TRACEOUT(("%.4x", Z80_PC)); | |
| // if (Z80_PC == 0x8198) { | |
| // TRACEOUT(("---->sound")); | |
| // } | |
| // if (Z80_PC == 0x8188) { | |
| // TRACEOUT(("-- poll sound")); | |
| // } | |
| #endif | |
| #if IPTRACE | #if IPTRACE |
| treip[trpos & (IPTRACE - 1)] = Z80_PC; | treip[trpos & (IPTRACE - 1)] = Z80_PC; |
| trpos++; | trpos++; |
| Line 265 extern BYTE disp_flashscreen; | Line 270 extern BYTE disp_flashscreen; |
| } | } |
| v_cnt++; | v_cnt++; |
| if (crtc.CRT_YL == v_cnt) { | if (crtc.CRT_YL == v_cnt) { |
| // TRACEOUT(("--->sync")); | |
| pcg.r.vsync = 1; | pcg.r.vsync = 1; |
| if (xmilcfg.DISPSYNC == 1) { | if (xmilcfg.DISPSYNC == 1) { |
| xmilcfg.DISPSYNC |= 0x80; | xmilcfg.DISPSYNC |= 0x80; |