--- xmil/pccore.c 2004/08/01 05:31:29 1.1 +++ xmil/pccore.c 2004/08/03 12:50:53 1.5 @@ -10,7 +10,6 @@ #include "x1_io.h" #include "x1_crtc.h" #include "x1_vram.h" -#include "x1_fdc.h" #include "draw.h" #include "sound.h" #include "sndctrl.h" @@ -39,9 +38,6 @@ const OEMCHAR xmilversion[] = OEMTEXT(XM BYTE mMAIN[0x10000]; BYTE mBIOS[0x8000]; BYTE mBANK[16][0x8000]; -// BYTE KNJ_FNT[0x4bc00]; - BYTE GRP_RAM[0x20000]; - BYTE TXT_RAM[0x01800]; WORD v_cnt; int s_cnt; @@ -62,16 +58,16 @@ void ipl_load(void) { FILEH hdl; ZeroMemory(mBIOS, sizeof(mBIOS)); - memcpy(mBIOS, DEFROM, sizeof(DEFROM)); + CopyMemory(mBIOS, DEFROM, sizeof(DEFROM)); if (pccore.ROM_TYPE >= 2) { - if ((hdl = file_open_c("IPLROM.X1T")) != FILEH_INVALID) { + if ((hdl = file_open_c(OEMTEXT("IPLROM.X1T"))) != FILEH_INVALID) { file_read(hdl, mBIOS, 0x8000); file_close(hdl); } } else if (pccore.ROM_TYPE == 1) { - if ((hdl = file_open_c("IPLROM.X1")) != FILEH_INVALID) { + if ((hdl = file_open_c(OEMTEXT("IPLROM.X1"))) != FILEH_INVALID) { file_read(hdl, mBIOS, 0x8000); file_close(hdl); } @@ -124,7 +120,6 @@ BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ calendar_initialize(); - init_fdc(); subcpu_reset(); ppi_reset(); init_crtc(); @@ -134,6 +129,7 @@ BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_ cmt_reset(); ctc_reset(); dmac_reset(); + fdc_reset(); pcg_reset(); sio_reset(); sndboard_reset(); @@ -236,9 +232,19 @@ extern BYTE disp_flashscreen; s_cnt = 0; xmilcfg.DISPSYNC &= 1; inttiming = xmilcfg.CPU8MHz & 1; +// TRACEOUT(("*sync")); while(s_cnt < 266) { while(h_cnt < pccore.HSYNC_CLK) { +#if defined(TRACE) +// TRACEOUT(("%.4x", Z80_PC)); +// if (Z80_PC == 0x8198) { +// TRACEOUT(("---->sound")); +// } +// if (Z80_PC == 0x8188) { +// TRACEOUT(("-- poll sound")); +// } +#endif #if IPTRACE treip[trpos & (IPTRACE - 1)] = Z80_PC; trpos++; @@ -265,6 +271,7 @@ extern BYTE disp_flashscreen; } v_cnt++; if (crtc.CRT_YL == v_cnt) { +// TRACEOUT(("--->sync")); pcg.r.vsync = 1; if (xmilcfg.DISPSYNC == 1) { xmilcfg.DISPSYNC |= 0x80;