--- xmil/pccore.c	2004/08/13 04:08:33	1.30
+++ xmil/pccore.c	2004/08/20 23:01:13	1.35
@@ -26,18 +26,11 @@ const OEMCHAR xmilversion[] = OEMTEXT(XM
 
 	XMILCFG		xmilcfg = { 2, 1, 0x03,
 							1, 0, 0, 0,
-							22050, 500, 0, 0, 80,
+							22050, 500, 0, 64, 64, 0, 80,
 							0, 0, 0, 0};
 
 	PCCORE		pccore;
 	CORESTAT	corestat;
-	UINT8		mMAIN[0x10000];
-	UINT8		mBIOS[0x8000];
-#if defined(SUPPORT_BANKMEM)
-	UINT8		mBANK[16][0x8000];
-#endif
-	UINT8		*RAM0r;
-	UINT8		*RAM0w;
 
 
 // ----
@@ -46,18 +39,18 @@ static void ipl_load(void) {
 
 	FILEH	hdl;
 
-	ZeroMemory(mBIOS, sizeof(mBIOS));
-	CopyMemory(mBIOS, DEFROM, sizeof(DEFROM));
+	ZeroMemory(biosmem, 0x8000);
+	CopyMemory(biosmem, DEFROM, sizeof(DEFROM));
 
 	if (pccore.ROM_TYPE >= 2) {
 		if ((hdl = file_open_c(OEMTEXT("IPLROM.X1T"))) != FILEH_INVALID) {
-			file_read(hdl, mBIOS, 0x8000);
+			file_read(hdl, biosmem, 0x8000);
 			file_close(hdl);
 		}
 	}
 	else if (pccore.ROM_TYPE == 1) {
 		if ((hdl = file_open_c(OEMTEXT("IPLROM.X1"))) != FILEH_INVALID) {
-			file_read(hdl, mBIOS, 0x8000);
+			file_read(hdl, biosmem, 0x8000);
 			file_close(hdl);
 		}
 	}
@@ -68,6 +61,7 @@ static void ipl_load(void) {
 
 void pccore_initialize(void) {
 
+	Z80_INITIALIZE();
 	fddfile_initialize();
 	sndctrl_initialize();
 	makescrn_initialize();
@@ -129,9 +123,6 @@ void pccore_reset(void) {
 
 	ipl_load();
 
-	RAM0r = mBIOS;
-	RAM0w = mMAIN;
-
 	pal_reset();
 	makescrn_reset();
 	timing_reset();
@@ -177,7 +168,6 @@ void iptrace_out(void) {
 void neitem_disp(UINT id) {
 
 	corestat.vsync = 1;
-	pcg.r.vsync = 1;
 	if (xmilcfg.DISPSYNC & 1) {
 		scrnupdate();
 	}
@@ -195,15 +185,18 @@ void neitem_vsync(UINT id) {
 
 // #define	SINGLESTEPONLY
 
+
 void pccore_exec(BRESULT draw) {
 
 	SINT32	frameclock;
 	SINT32	dispclock;
 
 	corestat.drawframe = draw;
+	pal_eventclear();
 	soundmng_sync();
 
-	frameclock = 266 * RASTER_CLOCK * pccore.multiple / 2;
+	timing_setrate(crtc.e.frameclock);
+	frameclock = crtc.e.frameclock * pccore.multiple / 2;
 	dispclock = min(frameclock, crtc.e.dispclock);
 	corestat.dispclock = dispclock;
 	corestat.syncclock = frameclock - dispclock;
@@ -216,6 +209,7 @@ void pccore_exec(BRESULT draw) {
 		}
 #else
 		while(CPU_REMCLOCK > 0) {
+		//	TRACEOUT(("%.4x", Z80_PC));
 #if defined(TRACE) && IPTRACE
 			treip[trpos & (IPTRACE - 1)] = Z80_PC;
 			trpos++;