--- xmil/pccore.h	2004/08/08 09:12:06	1.6
+++ xmil/pccore.h	2004/08/20 12:09:20	1.17
@@ -1,8 +1,8 @@
 
 typedef struct {
 	UINT8	ROM_TYPE;
-	UINT8	CPU8MHz;
 	UINT8	DIP_SW;
+	UINT8	fddequip;
 
 	UINT8	DISPSYNC;
 	UINT8	RASTER;
@@ -12,6 +12,8 @@ typedef struct {
 	UINT16	samplingrate;
 	UINT16	delayms;
 	UINT8	SOUND_SW;
+	UINT8	vol_fm;
+	UINT8	vol_ssg;
 	UINT8	MOTOR;
 	UINT8	MOTORVOL;
 
@@ -22,13 +24,19 @@ typedef struct {
 } XMILCFG;
 
 typedef struct {
-	UINT16	HSYNC_CLK;
+	UINT32	baseclock;
+	UINT	multiple;
+	UINT32	realclock;
+
 	UINT8	ROM_TYPE;
 	UINT8	DIP_SW;
 	UINT8	SOUND_SW;
 } PCCORE;
 
 typedef struct {
+	SINT32	dispclock;
+	SINT32	syncclock;
+	UINT8	vsync;
 	UINT8	drawframe;
 	UINT8	soundrenewal;
 } CORESTAT;
@@ -48,19 +56,17 @@ extern const OEMCHAR xmilversion[];
 extern	XMILCFG		xmilcfg;
 extern	PCCORE		pccore;
 extern	CORESTAT	corestat;
-extern	BYTE		*RAM0r;
-extern	BYTE		*RAM0w;
-extern	DWORD		h_cntbase;
-
-extern	BYTE	mMAIN[0x10000];
-extern	BYTE	mBIOS[0x8000];
-extern	BYTE	mBANK[16][0x8000];
+extern	UINT8		*RAM0r;
+extern	UINT8		*RAM0w;
 
-#define	h_cnt	Z80_ICOUNT
-extern	WORD	v_cnt;
+extern	UINT8	mMAIN[0x10000];
+extern	UINT8	mBIOS[0x8000];
+#if defined(SUPPORT_BANKMEM)
+extern	UINT8	mBANK[16][0x8000];
+#endif
 
-// BYTE reset_x1(BYTE ROM_TYPE, BYTE SOUND_SW, BYTE DIP_SW);
-// void x1r_exec(void);
+void neitem_disp(UINT id);
+void neitem_vsync(UINT id);
 
 void pccore_initialize(void);
 void pccore_reset(void);