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| version 1.6, 2004/08/11 16:09:04 | version 1.9, 2005/02/04 06:42:14 |
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| Line 17 | Line 17 |
| Z80CORE z80core; | Z80CORE z80core; |
| UINT8 mainmem[0x10000]; | |
| UINT8 ZSPtable[256]; | UINT8 z80inc_flag2[256]; |
| UINT8 z80inc_flag[256]; | UINT8 z80dec_flag2[256]; |
| UINT8 z80dec_flag[256]; | |
| UINT8 z80szc_flag[512]; | UINT8 z80szc_flag[512]; |
| UINT8 z80szp_flag[256]; | |
| const UINT8 cycles_main[256] = { | const UINT8 cycles_main[256] = { |
| 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4, | 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4, |
| Line 98 void CPUCALL z80c_initialize(void) { | Line 99 void CPUCALL z80c_initialize(void) { |
| } | } |
| } | } |
| ZSPtable[i] = (UINT8)f; | z80szp_flag[i] = (UINT8)f; |
| z80inc_flag[i] = (UINT8)(f & (~V_FLAG)); | z80inc_flag2[(i - 1) & 0xff] = (UINT8)(f & (~V_FLAG)); |
| if (!(i & 0x0f)) { | if (!(i & 0x0f)) { |
| z80inc_flag[i] |= H_FLAG; | z80inc_flag2[(i - 1) & 0xff] |= H_FLAG; |
| } | } |
| z80dec_flag[i] = (UINT8)(f & (~V_FLAG)) | N_FLAG; | z80dec_flag2[(i + 1) & 0xff] = (UINT8)(f & (~V_FLAG)) | N_FLAG; |
| if ((i & 0x0f) == 0x0f) { | if ((i & 0x0f) == 0x0f) { |
| z80dec_flag[i] |= H_FLAG; | z80dec_flag2[(i + 1) & 0xff] |= H_FLAG; |
| } | } |
| z80szc_flag[i] = (UINT8)(f & (~V_FLAG)); | z80szc_flag[i] = (UINT8)(f & (~V_FLAG)); |
| z80szc_flag[i+256] = (UINT8)(f & (~V_FLAG)) | C_FLAG; | z80szc_flag[i+256] = (UINT8)(f & (~V_FLAG)) | C_FLAG; |
| } | } |
| z80inc_flag[0x80] |= V_FLAG; | z80inc_flag2[0x80 - 1] |= V_FLAG; |
| z80dec_flag[0x7f] |= V_FLAG; | z80dec_flag2[0x7f + 1] |= V_FLAG; |
| } | } |
| void CPUCALL z80c_reset(void) { | void CPUCALL z80c_reset(void) { |
| z80c_initialize(); | |
| ZeroMemory(&z80core.s, sizeof(z80core.s)); | ZeroMemory(&z80core.s, sizeof(z80core.s)); |
| R_Z80R = rand_get(); | R_Z80R = rand_get(); |
| } | } |
| REG8 CPUCALL z80c_ableinterrupt(void) { | |
| return((Z80_IFF & ((1 << IFF_IFLAG) | (1 << IFF_IRQ) | (1 << IFF_NMI))) | |
| ?0:1); | |
| } | |
| void CPUCALL z80c_interrupt(REG8 vect) { | void CPUCALL z80c_interrupt(REG8 vect) { |
| REG16 pc; | REG16 pc; |
| Line 138 void CPUCALL z80c_interrupt(REG8 vect) { | Line 131 void CPUCALL z80c_interrupt(REG8 vect) { |
| Z80_IFF ^= (1 << IFF_HALT); | Z80_IFF ^= (1 << IFF_HALT); |
| R_Z80PC++; | R_Z80PC++; |
| } | } |
| Z80_IFF |= (1 << IFF_IRQ) | (1 << IFF_IFLAG); | Z80_IFF |= (1 << IFF_IFLAG); |
| switch(R_Z80IM) { | switch(R_Z80IM) { |
| case 0: | case 0: |
| if ((vect != 0xdd) && (vect != 0xed) && (vect != 0xfd)) { | if ((vect != 0xdd) && (vect != 0xed) && (vect != 0xfd)) { |
| Line 181 void CPUCALL z80c_execute(void) { | Line 174 void CPUCALL z80c_execute(void) { |
| UINT op; | UINT op; |
| if (!dma.working) { | #if !defined(DMAS_STOIC) |
| if (!dma.working) | |
| #else | |
| if (!(dma.flag & DMAF_WORKING)) | |
| #endif | |
| { | |
| do { | do { |
| R_Z80R++; | R_Z80R++; |
| GET_PC_BYTE(op); | GET_PC_BYTE(op); |