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| version 1.1, 2004/08/01 05:31:32 | version 1.3, 2004/08/11 12:08:17 |
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| Line 7 | Line 7 |
| //---------------------------------------------------------------------------- | //---------------------------------------------------------------------------- |
| #define __CBW(src) (UINT16)((SINT8)(src)) | #define Z80_COUNT(clock) \ |
| #define __CBD(src) ((SINT8)(src)) | do { \ |
| #define WORD2LONG(src) ((SINT16)(src)) | CPU_REMCLOCK -= (clock); \ |
| #define Z80_COUNT(clock) \ | |
| do { \ | |
| Z80_ICOUNT += (clock); \ | |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define Z80IRQCHECKTERM \ | #define Z80IRQCHECKTERM \ |
| do { } while (/*CONSTCOND*/ 0) | do { } while (/*CONSTCOND*/ 0) |
| #define GET_PC_BYTE(b) \ | #define GET_PC_BYTE(b) \ |
| do { \ | do { \ |
| (b) = Z80_RDMEM(R_Z80PC++); \ | (b) = mem_read8(R_Z80PC++); \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define GET_PC_WORD(w) \ | #define GET_PC_WORD(w) \ |
| do { \ | do { \ |
| (w) = Z80_RDMEM_W(R_Z80PC); \ | (w) = mem_read16(R_Z80PC); \ |
| R_Z80PC += 2; \ | R_Z80PC += 2; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define MCR_EX1(r1, r2) \ | #define MCR_EX1(r1, r2) \ |
| do { \ | do { \ |
| REG16 tmp; \ | REG16 tmp; \ |
| tmp = (r1); \ | tmp = (r1); \ |
| (r1) = (r2); \ | (r1) = (r2); \ |
| (r2) = tmp; \ | (r2) = tmp; \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define JRBYFLAG(flg) \ | #define JRBYFLAG(flg) \ |
| do { \ | do { \ |
| if ((flg)) { \ | if ((flg)) { \ |
| UINT8 ads; \ | SINT ofst; \ |
| ads = Z80_RDMEM(R_Z80PC++); \ | ofst = mem_read8s(R_Z80PC++); \ |
| R_Z80PC += __CBW(ads); \ | R_Z80PC += ofst; \ |
| Z80_COUNT(5); \ | Z80_COUNT(5); \ |
| } \ | } \ |
| else { \ | else { \ |
| R_Z80PC++; \ | R_Z80PC++; \ |
| } \ | } \ |
| } while (/*CONSTCOND*/ 0) | } while (/*CONSTCOND*/ 0) |
| #define LDW_w(reg) { \ | #define LDW_w(reg) { \ |
| (reg) = Z80_RDMEM_W(R_Z80PC); \ | (reg) = mem_read16(R_Z80PC); \ |
| R_Z80PC += 2; \ | R_Z80PC += 2; \ |
| } | } |
| #define LDx_B(dst, src) { \ | #define LDx_B(dst, src) { \ |
| Z80_WRMEM((dst), (src)); \ | mem_write8((dst), (src)); \ |
| } | } |
| #define MCR_INC_W(reg) { \ | #define MCR_INC_W(reg) { \ |
| (reg)++; \ | (reg)++; \ |
| } | } |
| #define MCR_INC(reg) { \ | #define MCR_INC(reg) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| (reg)++; \ | (reg)++; \ |
| R_Z80F |= z80inc_flag[(reg)]; \ | R_Z80F |= z80inc_flag[(reg)]; \ |
| } | } |
| #define MCR_DEC(reg) { \ | #define MCR_DEC(reg) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| (reg)--; \ | (reg)--; \ |
| R_Z80F |= z80dec_flag[(reg)]; \ | R_Z80F |= z80dec_flag[(reg)]; \ |
| } | } |
| #define LDB_b(reg) { \ | #define LDB_b(reg) { \ |
| (reg) = Z80_RDMEM(R_Z80PC++); \ | (reg) = mem_read8(R_Z80PC++); \ |
| } | } |
| #define MCR_RLCA { \ | #define MCR_RLCA { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = (UINT8)(R_Z80A >> 7); \ | tmp = (UINT8)(R_Z80A >> 7); \ |
| R_Z80A = (R_Z80A << 1) | tmp; \ | R_Z80A = (R_Z80A << 1) | tmp; \ |
| R_Z80F &= 0xec; \ | R_Z80F &= 0xec; \ |
| R_Z80F |= tmp; \ | R_Z80F |= tmp; \ |
| } | } |
| #define MCR_EX(reg1, reg2) { \ | #define MCR_EX(reg1, reg2) { \ |
| MCR_EX1(reg1, reg2); \ | MCR_EX1(reg1, reg2); \ |
| } | } |
| #define MCR_ADD_W(dst, src) { \ | #define MCR_ADD_W(dst, src) { \ |
| UINT32 tmp; \ | UINT32 tmp; \ |
| R_Z80F &= (S_FLAG | Z_FLAG | V_FLAG); \ | R_Z80F &= (S_FLAG | Z_FLAG | V_FLAG); \ |
| tmp = (UINT32)(dst) + (UINT32)(src); \ | tmp = (dst) + (src); \ |
| R_Z80F |= (UINT8)(tmp >> 16); \ | R_Z80F |= (UINT8)(tmp >> 16); \ |
| R_Z80F |= ((tmp ^ (dst) ^ (src)) >> 8) & H_FLAG; \ | R_Z80F |= ((tmp ^ (dst) ^ (src)) >> 8) & H_FLAG; \ |
| (dst) = (UINT16)tmp; \ | (dst) = (UINT16)tmp; \ |
| } | } |
| #define LDB_x(b, w) { \ | #define LDB_x(b, w) { \ |
| (b) = Z80_RDMEM((w)); \ | (b) = mem_read8((w)); \ |
| } | } |
| #define MCR_DEC_W(reg) { \ | #define MCR_DEC_W(reg) { \ |
| (reg)--; \ | (reg)--; \ |
| } | } |
| #define MCR_RRCA { \ | #define MCR_RRCA { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = (UINT8)(R_Z80A & 1); \ | tmp = (UINT8)(R_Z80A & 1); \ |
| R_Z80F &= 0xec; \ | R_Z80F &= 0xec; \ |
| R_Z80F |= tmp; \ | R_Z80F |= tmp; \ |
| R_Z80A = (R_Z80A >> 1) | (tmp << 7); \ | R_Z80A = (R_Z80A >> 1) | (tmp << 7); \ |
| } | } |
| #define MCR_DJNZ { \ | #define MCR_DJNZ { \ |
| R_Z80B--; \ | R_Z80B--; \ |
| JRBYFLAG(R_Z80B); \ | JRBYFLAG(R_Z80B); \ |
| } | } |
| #define MCR_RLA { \ | #define MCR_RLA { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = (UINT8)(R_Z80A >> 7); \ | tmp = (UINT8)(R_Z80A >> 7); \ |
| R_Z80A = (R_Z80A << 1) | (R_Z80F & 1); \ | R_Z80A = (R_Z80A << 1) | (R_Z80F & 1); \ |
| R_Z80F &= 0xec; \ | R_Z80F &= 0xec; \ |
| R_Z80F |= tmp; \ | R_Z80F |= tmp; \ |
| } | } |
| #define MCR_JR { \ | #define MCR_JR { \ |
| UINT8 ads; \ | SINT ofst; \ |
| ads = Z80_RDMEM(R_Z80PC++); \ | ofst = mem_read8s(R_Z80PC++); \ |
| R_Z80PC += __CBW(ads); \ | R_Z80PC += ofst; \ |
| Z80_COUNT(5); \ | Z80_COUNT(5); \ |
| } | } |
| #define MCR_RRA { \ | #define MCR_RRA { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = (UINT8)(R_Z80A & 1); \ | tmp = (UINT8)(R_Z80A & 1); \ |
| R_Z80A = (R_Z80A >> 1) | (R_Z80F << 7); \ | R_Z80A = (R_Z80A >> 1) | (R_Z80F << 7); \ |
| R_Z80F &= 0xec; \ | R_Z80F &= 0xec; \ |
| R_Z80F |= tmp; \ | R_Z80F |= tmp; \ |
| } | } |
| #define MCR_JRNFLG(flg) { \ | #define MCR_JRNFLG(flg) { \ |
| JRBYFLAG(!(R_Z80F & (flg))); \ | JRBYFLAG(!(R_Z80F & (flg))); \ |
| } | } |
| #define LDx_W(reg) { \ | #define LDx_W(reg) { \ |
| UINT adrs; \ | UINT adrs; \ |
| GET_PC_WORD(adrs); \ | GET_PC_WORD(adrs); \ |
| Z80_WRMEM_W(adrs, (reg)); \ | mem_write16(adrs, (reg)); \ |
| } | } |
| #define MCR_DDA { \ | #define MCR_DDA { \ |
| int dst; \ | SINT dst; \ |
| BYTE flg; \ | REG8 flg; \ |
| int alow; \ | SINT alow; \ |
| dst = R_Z80A; \ | dst = R_Z80A; \ |
| alow = R_Z80A & 0x0f; \ | alow = R_Z80A & 0x0f; \ |
| flg = R_Z80F & N_FLAG; \ | flg = R_Z80F & N_FLAG; \ |
| if (!flg) { \ | if (!flg) { \ |
| if (alow >= 10) { \ | if (alow >= 10) { \ |
| flg |= H_FLAG; \ | flg |= H_FLAG; \ |
| dst += 6; \ | dst += 6; \ |
| } \ | } \ |
| else if (R_Z80F & H_FLAG) { \ | else if (R_Z80F & H_FLAG) { \ |
| dst += 6; \ | dst += 6; \ |
| } \ | } \ |
| if ((dst >= 0xa0) || (R_Z80F & C_FLAG)) { \ | if ((dst >= 0xa0) || (R_Z80F & C_FLAG)) { \ |
| flg |= C_FLAG; \ | flg |= C_FLAG; \ |
| dst += 0x60; \ | dst += 0x60; \ |
| } \ | } \ |
| } \ | } \ |
| else { \ | else { \ |
| if ((dst > 0x99) || (R_Z80F & C_FLAG)) { \ | if ((dst > 0x99) || (R_Z80F & C_FLAG)) { \ |
| dst -= 0x60; \ | dst -= 0x60; \ |
| flg |= C_FLAG; \ | flg |= C_FLAG; \ |
| } \ | } \ |
| if ((alow > 9) || (R_Z80F & H_FLAG)) { \ | if ((alow > 9) || (R_Z80F & H_FLAG)) { \ |
| if (alow < 6) { \ | if (alow < 6) { \ |
| flg |= H_FLAG; \ | flg |= H_FLAG; \ |
| } \ | } \ |
| dst -= 6; \ | dst -= 6; \ |
| if ((dst < 0) && (!(R_Z80F & H_FLAG))) { \ | if ((dst < 0) && (!(R_Z80F & H_FLAG))) { \ |
| flg |= C_FLAG; \ | flg |= C_FLAG; \ |
| } \ | } \ |
| } \ | } \ |
| } \ | } \ |
| R_Z80A = (BYTE)dst; \ | R_Z80A = (UINT8)dst; \ |
| R_Z80F = flg | ZSPtable[dst & 0xff]; \ | R_Z80F = flg | ZSPtable[dst & 0xff]; \ |
| } | } |
| #define MCR_JRFLG(flg) { \ | #define MCR_JRFLG(flg) { \ |
| JRBYFLAG(R_Z80F & (flg)); \ | JRBYFLAG(R_Z80F & (flg)); \ |
| } | } |
| #define MCR_ADDx2(reg) { \ | #define MCR_ADDx2(reg) { \ |
| R_Z80F &= (S_FLAG | Z_FLAG | V_FLAG); \ | R_Z80F &= (S_FLAG | Z_FLAG | V_FLAG); \ |
| R_Z80F |= (BYTE)((reg) >> 15); \ | R_Z80F |= (UINT8)((reg) >> 15); \ |
| (reg) <<= 1; \ | (reg) <<= 1; \ |
| R_Z80F |= ((reg) >> 8) & H_FLAG; \ | R_Z80F |= ((reg) >> 8) & H_FLAG; \ |
| } | } |
| #define LDW_x(reg) { \ | #define LDW_x(reg) { \ |
| UINT adrs; \ | UINT adrs; \ |
| GET_PC_WORD(adrs); \ | GET_PC_WORD(adrs); \ |
| (reg) = Z80_RDMEM_W(adrs); \ | (reg) = mem_read16(adrs); \ |
| } | } |
| #define MCR_CPL { \ | #define MCR_CPL { \ |
| R_Z80A = (UINT8)~R_Z80A; \ | R_Z80A = (UINT8)(~R_Z80A); \ |
| R_Z80F |= (H_FLAG | N_FLAG); \ | R_Z80F |= (H_FLAG | N_FLAG); \ |
| } | } |
| #define LDB_x_a { \ | #define LDB_x_a { \ |
| UINT adrs; \ | UINT adrs; \ |
| GET_PC_WORD(adrs); \ | GET_PC_WORD(adrs); \ |
| Z80_WRMEM(adrs, R_Z80A); \ | mem_write8(adrs, R_Z80A); \ |
| } | } |
| #define MCR_INC_MEM(adrs) { \ | #define MCR_INC_MEM(adrs) { \ |
| BYTE tmp; \ | UINT8 tmp; \ |
| tmp = Z80_RDMEM((adrs)); \ | tmp = mem_read8((adrs)); \ |
| tmp++; \ | tmp++; \ |
| Z80_WRMEM((adrs), tmp); \ | mem_write8((adrs), tmp); \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80inc_flag[tmp]; \ | R_Z80F |= z80inc_flag[tmp]; \ |
| } | } |
| #define MCR_DEC_MEM(adrs) { \ | #define MCR_DEC_MEM(adrs) { \ |
| UINT8 tmp; \ | UINT8 tmp; \ |
| tmp = Z80_RDMEM((adrs)); \ | tmp = mem_read8((adrs)); \ |
| tmp--; \ | tmp--; \ |
| Z80_WRMEM((adrs), tmp); \ | mem_write8((adrs), tmp); \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80dec_flag[tmp]; \ | R_Z80F |= z80dec_flag[tmp]; \ |
| } | } |
| #define LDB_xhl_b { \ | |
| REG8 tmp; \ | |
| GET_PC_BYTE(tmp); \ | |
| Z80_WRMEM(R_Z80HL, tmp); \ | |
| } | |
| #define MCR_SCF { \ | |
| R_Z80F &= ~(H_FLAG | N_FLAG); \ | |
| R_Z80F |= C_FLAG; \ | |
| } | |
| #define LDB_a_x { \ | |
| UINT adrs; \ | |
| GET_PC_WORD(adrs); \ | |
| R_Z80A = Z80_RDMEM(adrs); \ | |
| } | |
| #define MCR_CCF { \ | |
| R_Z80F &= ~(H_FLAG | N_FLAG); \ | |
| if (R_Z80F & C_FLAG) { \ | |
| R_Z80F |= H_FLAG; \ | |
| } \ | |
| R_Z80F ^= C_FLAG; \ | |
| } | |
| #define MCR_LD(d, s) { \ | #define LDB_xhl_b { \ |
| (d) = (s); \ | REG8 tmp; \ |
| GET_PC_BYTE(tmp); \ | |
| mem_write8(R_Z80HL, tmp); \ | |
| } | } |
| #define MCR_HALT { \ | #define MCR_SCF { \ |
| R_Z80PC--; \ | R_Z80F &= ~(H_FLAG | N_FLAG); \ |
| Z80_IFF |= (1 << IFF_HALT); \ | R_Z80F |= C_FLAG; \ |
| Z80IRQCHECKTERM; \ | |
| } | } |
| #define LDB_a_x { \ | |
| UINT adrs; \ | |
| GET_PC_WORD(adrs); \ | |
| R_Z80A = mem_read8(adrs); \ | |
| } | |
| #define MCR_ADD(b) { \ | #define MCR_CCF { \ |
| DWORD res; \ | R_Z80F &= ~(H_FLAG | N_FLAG); \ |
| res = (DWORD)R_Z80A + (DWORD)(b); \ | if (R_Z80F & C_FLAG) { \ |
| R_Z80F = z80szc_flag[res & 0x1ff]; \ | R_Z80F |= H_FLAG; \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | } \ |
| R_Z80F |= (((res ^ R_Z80A) & (res ^ (b))) \ | R_Z80F ^= C_FLAG; \ |
| >> 5) & V_FLAG; \ | } |
| R_Z80A = (BYTE)res; \ | |
| } | |
| #define MCR_ADD_XHL { \ | #define MCR_LD(d, s) { \ |
| BYTE tmp; \ | (d) = (s); \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | } |
| MCR_ADD(tmp) \ | |
| } | |
| #define MCR_ADC(b) { \ | #define MCR_HALT { \ |
| DWORD res; \ | R_Z80PC--; \ |
| res = (DWORD)R_Z80A + (DWORD)(b) + (R_Z80F & 1); \ | Z80_IFF |= (1 << IFF_HALT); \ |
| R_Z80F = z80szc_flag[res & 0x1ff]; \ | Z80IRQCHECKTERM; \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | |
| R_Z80F |= (((res ^ R_Z80A) & (res ^ (b))) \ | |
| >> 5) & V_FLAG; \ | |
| R_Z80A = (BYTE)res; \ | |
| } | } |
| #define MCR_ADC_XHL { \ | |
| BYTE tmp; \ | |
| tmp = Z80_RDMEM(R_Z80HL); \ | |
| MCR_ADC(tmp) \ | |
| } | |
| #define MCR_ADD(b) { \ | |
| UINT res; \ | |
| res = R_Z80A + (b); \ | |
| R_Z80F = z80szc_flag[res & 0x1ff]; \ | |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | |
| R_Z80F |= (((res ^ R_Z80A) & (res ^ (b))) >> 5) & V_FLAG; \ | |
| R_Z80A = (UINT8)res; \ | |
| } | |
| #define MCR_SUB(b) { \ | #define MCR_ADD_XHL { \ |
| DWORD res; \ | REG8 tmp; \ |
| res = (DWORD)R_Z80A - (DWORD)(b); \ | tmp = mem_read8(R_Z80HL); \ |
| R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ | MCR_ADD(tmp) \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | } |
| R_Z80F |= (((R_Z80A^res) & (R_Z80A^(b))) \ | |
| >> 5) & V_FLAG; \ | |
| R_Z80A = (BYTE)res; \ | |
| } | |
| #define MCR_SUB_XHL { \ | #define MCR_ADC(b) { \ |
| BYTE tmp; \ | UINT res; \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | res = R_Z80A + (b) + (R_Z80F & 1); \ |
| MCR_SUB(tmp) \ | R_Z80F = z80szc_flag[res & 0x1ff]; \ |
| } | R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ |
| R_Z80F |= (((res ^ R_Z80A) & (res ^ (b))) >> 5) & V_FLAG; \ | |
| R_Z80A = (UINT8)res; \ | |
| } | |
| #define MCR_SBC(b) { \ | #define MCR_ADC_XHL { \ |
| DWORD res; \ | REG8 tmp; \ |
| res = (DWORD)R_Z80A - (DWORD)(b) - (R_Z80F & 1); \ | tmp = mem_read8(R_Z80HL); \ |
| R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ | MCR_ADC(tmp) \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | } |
| R_Z80F |= (((R_Z80A^res) & (R_Z80A^(b))) \ | |
| >> 5) & V_FLAG; \ | |
| R_Z80A = (BYTE)res; \ | |
| } | |
| #define MCR_SBC_XHL { \ | |
| BYTE tmp; \ | |
| tmp = Z80_RDMEM(R_Z80HL); \ | |
| MCR_SBC(tmp) \ | |
| } | |
| #define MCR_SUB(b) { \ | |
| UINT res; \ | |
| res = R_Z80A - (b); \ | |
| R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ | |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | |
| R_Z80F |= (((R_Z80A ^ res) & (R_Z80A ^ (b))) >> 5) & V_FLAG; \ | |
| R_Z80A = (UINT8)res; \ | |
| } | |
| #define MCR_AND(b) { \ | #define MCR_SUB_XHL { \ |
| R_Z80A &= (b); \ | REG8 tmp; \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | tmp = mem_read8(R_Z80HL); \ |
| } | MCR_SUB(tmp) \ |
| } | |
| #define MCR_AND_XHL { \ | #define MCR_SBC(b) { \ |
| BYTE tmp; \ | UINT res; \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | res = R_Z80A - (b) - (R_Z80F & 1); \ |
| MCR_AND(tmp) \ | R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ |
| } | R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ |
| R_Z80F |= (((R_Z80A ^ res) & (R_Z80A ^ (b))) >> 5) & V_FLAG; \ | |
| R_Z80A = (UINT8)res; \ | |
| } | |
| #define MCR_XOR(b) { \ | #define MCR_SBC_XHL { \ |
| R_Z80A ^= (b); \ | REG8 tmp; \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | tmp = mem_read8(R_Z80HL); \ |
| } | MCR_SBC(tmp) \ |
| } | |
| #define MCR_XOR_XHL { \ | |
| BYTE tmp; \ | |
| tmp = Z80_RDMEM(R_Z80HL); \ | |
| MCR_XOR(tmp) \ | |
| } | |
| #define MCR_AND(b) { \ | |
| R_Z80A &= (b); \ | |
| R_Z80F = ZSPtable[R_Z80A]; \ | |
| } | |
| #define MCR_OR(b) { \ | #define MCR_AND_XHL { \ |
| R_Z80A |= (b); \ | REG8 tmp; \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | tmp = mem_read8(R_Z80HL); \ |
| } | MCR_AND(tmp) \ |
| } | |
| #define MCR_OR_XHL { \ | #define MCR_XOR(b) { \ |
| BYTE tmp; \ | R_Z80A ^= (b); \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | R_Z80F = ZSPtable[R_Z80A]; \ |
| MCR_OR(tmp) \ | } |
| } | |
| #define MCR_CP(b) { \ | #define MCR_XOR_XHL { \ |
| DWORD res; \ | REG8 tmp; \ |
| res = (DWORD)R_Z80A - (DWORD)(b); \ | tmp = mem_read8(R_Z80HL); \ |
| R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ | MCR_XOR(tmp) \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | } |
| R_Z80F |= (((R_Z80A^res) & (R_Z80A^(b))) \ | |
| >> 5) & V_FLAG; \ | |
| } | |
| #define MCR_CP_XHL { \ | |
| BYTE tmp; \ | |
| tmp = Z80_RDMEM(R_Z80HL); \ | |
| MCR_CP(tmp) \ | |
| } | |
| #define MCR_OR(b) { \ | |
| R_Z80A |= (b); \ | |
| R_Z80F = ZSPtable[R_Z80A]; \ | |
| } | |
| #define MCR_RETNFLG(flg) { \ | #define MCR_OR_XHL { \ |
| if (!(R_Z80F & (flg))) { \ | REG8 tmp; \ |
| R_Z80PC = Z80_RDMEM_W(R_Z80SP); \ | tmp = mem_read8(R_Z80HL); \ |
| R_Z80SP += 2; \ | MCR_OR(tmp) \ |
| Z80_COUNT(6); \ | } |
| } \ | |
| } | |
| #define MCR_POP(reg) { \ | #define MCR_CP(b) { \ |
| (reg) = Z80_RDMEM_W(R_Z80SP); \ | UINT res; \ |
| R_Z80SP += 2; \ | res = R_Z80A - (b); \ |
| } | R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ |
| R_Z80F |= (res ^ R_Z80A ^ (b)) & H_FLAG; \ | |
| R_Z80F |= (((R_Z80A ^ res) & (R_Z80A ^ (b))) >> 5) & V_FLAG; \ | |
| } | |
| #define MCR_JPNFLG(flg) { \ | #define MCR_CP_XHL { \ |
| if (!(R_Z80F & (flg))) { \ | REG8 tmp; \ |
| WORD tmp; \ | tmp = mem_read8(R_Z80HL); \ |
| tmp = Z80_RDMEM_W(R_Z80PC); \ | MCR_CP(tmp) \ |
| R_Z80PC = tmp; \ | } |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_JP { \ | |
| WORD tmp; \ | |
| tmp = Z80_RDMEM_W(R_Z80PC); \ | |
| R_Z80PC = tmp; \ | |
| } | |
| #define MCR_CALLNFLG(flg) { \ | #define MCR_RETNFLG(flg) { \ |
| if (!(R_Z80F & (flg))) { \ | if (!(R_Z80F & (flg))) { \ |
| WORD tmp; \ | R_Z80PC = mem_read16(R_Z80SP); \ |
| GET_PC_WORD(tmp); \ | R_Z80SP += 2; \ |
| R_Z80SP -= 2; \ | Z80_COUNT(6); \ |
| Z80_WRMEM_W(R_Z80SP, R_Z80PC); \ | } \ |
| R_Z80PC = tmp; \ | } |
| Z80_COUNT(7); \ | |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_PUSH(reg) { \ | #define MCR_POP(reg) { \ |
| R_Z80SP -= 2; \ | (reg) = mem_read16(R_Z80SP); \ |
| Z80_WRMEM_W(R_Z80SP, (reg)); \ | R_Z80SP += 2; \ |
| } | } |
| #define MCR_ADD_BYTE { \ | #define MCR_JPNFLG(flg) { \ |
| BYTE tmp; \ | if (!(R_Z80F & (flg))) { \ |
| GET_PC_BYTE(tmp); \ | R_Z80PC = mem_read16(R_Z80PC); \ |
| MCR_ADD(tmp) \ | } \ |
| } | else { \ |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_RST(vect) { \ | #define MCR_JP { \ |
| R_Z80SP -= 2; \ | R_Z80PC = mem_read16(R_Z80PC); \ |
| Z80_WRMEM_W(R_Z80SP, R_Z80PC); \ | } |
| R_Z80PC = (vect); \ | |
| } | |
| #define MCR_RETFLG(flg) { \ | #define MCR_CALLNFLG(flg) { \ |
| if (R_Z80F & (flg)) { \ | if (!(R_Z80F & (flg))) { \ |
| R_Z80PC = Z80_RDMEM_W(R_Z80SP); \ | REG16 tmp; \ |
| R_Z80SP += 2; \ | GET_PC_WORD(tmp); \ |
| Z80_COUNT(6); \ | R_Z80SP -= 2; \ |
| } \ | mem_write16(R_Z80SP, R_Z80PC); \ |
| } | R_Z80PC = tmp; \ |
| Z80_COUNT(7); \ | |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_RET { \ | #define MCR_PUSH(reg) { \ |
| R_Z80PC = Z80_RDMEM_W(R_Z80SP); \ | R_Z80SP -= 2; \ |
| R_Z80SP += 2; \ | mem_write16(R_Z80SP, (reg)); \ |
| Z80_COUNT(6); \ | } |
| } | |
| #define MCR_JPFLG(flg) { \ | #define MCR_ADD_BYTE { \ |
| if (R_Z80F & (flg)) { \ | REG8 tmp; \ |
| WORD tmp; \ | GET_PC_BYTE(tmp); \ |
| tmp = Z80_RDMEM_W(R_Z80PC); \ | MCR_ADD(tmp) \ |
| R_Z80PC = tmp; \ | } |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_CALLFLG(flg) { \ | #define MCR_RST(vect) { \ |
| if (R_Z80F & (flg)) { \ | R_Z80SP -= 2; \ |
| WORD tmp; \ | mem_write16(R_Z80SP, R_Z80PC); \ |
| GET_PC_WORD(tmp); \ | R_Z80PC = (vect); \ |
| R_Z80SP -= 2; \ | } |
| Z80_WRMEM_W(R_Z80SP, R_Z80PC); \ | |
| R_Z80PC = tmp; \ | |
| Z80_COUNT(7); \ | |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_CALL { \ | #define MCR_RETFLG(flg) { \ |
| WORD tmp; \ | if (R_Z80F & (flg)) { \ |
| GET_PC_WORD(tmp); \ | R_Z80PC = mem_read16(R_Z80SP); \ |
| R_Z80SP -= 2; \ | R_Z80SP += 2; \ |
| Z80_WRMEM_W(R_Z80SP, R_Z80PC); \ | Z80_COUNT(6); \ |
| R_Z80PC = tmp; \ | } \ |
| Z80_COUNT(7); \ | } |
| } | |
| #define MCR_ADC_BYTE { \ | #define MCR_RET { \ |
| BYTE tmp; \ | R_Z80PC = mem_read16(R_Z80SP); \ |
| GET_PC_BYTE(tmp); \ | R_Z80SP += 2; \ |
| MCR_ADC(tmp) \ | Z80_COUNT(6); \ |
| } | } |
| #define MCR_JPFLG(flg) { \ | |
| if (R_Z80F & (flg)) { \ | |
| R_Z80PC = mem_read16(R_Z80PC); \ | |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_OUT_BYTE { \ | #define MCR_CALLFLG(flg) { \ |
| REG8 tmp; \ | if (R_Z80F & (flg)) { \ |
| GET_PC_BYTE(tmp); \ | REG16 tmp; \ |
| iocore_out((R_Z80A << 8) + tmp, tmp); \ | GET_PC_WORD(tmp); \ |
| } | R_Z80SP -= 2; \ |
| mem_write16(R_Z80SP, R_Z80PC); \ | |
| R_Z80PC = tmp; \ | |
| Z80_COUNT(7); \ | |
| } \ | |
| else { \ | |
| R_Z80PC += 2; \ | |
| } \ | |
| } | |
| #define MCR_SUB_BYTE { \ | #define MCR_CALL { \ |
| BYTE tmp; \ | REG16 tmp; \ |
| GET_PC_BYTE(tmp); \ | GET_PC_WORD(tmp); \ |
| MCR_SUB(tmp) \ | R_Z80SP -= 2; \ |
| } | mem_write16(R_Z80SP, R_Z80PC); \ |
| R_Z80PC = tmp; \ | |
| Z80_COUNT(7); \ | |
| } | |
| #define MCR_EXX { \ | #define MCR_ADC_BYTE { \ |
| MCR_EX(R_Z80BC, R_Z80BC2) \ | REG8 tmp; \ |
| MCR_EX(R_Z80DE, R_Z80DE2) \ | GET_PC_BYTE(tmp); \ |
| MCR_EX(R_Z80HL, R_Z80HL2) \ | MCR_ADC(tmp) \ |
| } | } |
| #define MCR_IN_BYTE { \ | |
| REG8 tmp; \ | |
| GET_PC_BYTE(tmp); \ | |
| R_Z80A = iocore_inp((R_Z80A << 8) | tmp); \ | |
| } | |
| #define MCR_SBC_BYTE { \ | #define MCR_OUT_BYTE { \ |
| BYTE tmp; \ | REG8 tmp; \ |
| GET_PC_BYTE(tmp); \ | GET_PC_BYTE(tmp); \ |
| MCR_SBC(tmp) \ | iocore_out((R_Z80A << 8) + tmp, tmp); \ |
| } | } |
| #define MCR_SUB_BYTE { \ | |
| REG8 tmp; \ | |
| GET_PC_BYTE(tmp); \ | |
| MCR_SUB(tmp) \ | |
| } | |
| #define MCR_EX_XSP(reg) { \ | #define MCR_EXX { \ |
| WORD tmp; \ | MCR_EX(R_Z80BC, R_Z80BC2) \ |
| tmp = Z80_RDMEM_W(R_Z80SP); \ | MCR_EX(R_Z80DE, R_Z80DE2) \ |
| Z80_WRMEM_W(R_Z80SP, (reg)); \ | MCR_EX(R_Z80HL, R_Z80HL2) \ |
| (reg) = tmp; \ | } |
| } | |
| #define MCR_AND_BYTE { \ | #define MCR_IN_BYTE { \ |
| BYTE tmp; \ | REG8 tmp; \ |
| GET_PC_BYTE(tmp); \ | GET_PC_BYTE(tmp); \ |
| MCR_AND(tmp) \ | R_Z80A = iocore_inp((R_Z80A << 8) | tmp); \ |
| } | } |
| #define MCR_LD_W(dst, src) { \ | #define MCR_SBC_BYTE { \ |
| (dst) = (src); \ | REG8 tmp; \ |
| } | GET_PC_BYTE(tmp); \ |
| MCR_SBC(tmp) \ | |
| } | |
| #define MCR_XOR_BYTE { \ | |
| BYTE tmp; \ | |
| GET_PC_BYTE(tmp); \ | |
| MCR_XOR(tmp) \ | |
| } | |
| #define MCR_EX_XSP(reg) { \ | |
| REG16 tmp; \ | |
| tmp = mem_read16(R_Z80SP); \ | |
| mem_write16(R_Z80SP, (reg)); \ | |
| (reg) = tmp; \ | |
| } | |
| #define MCR_DI { \ | #define MCR_AND_BYTE { \ |
| Z80_IFF |= (1 << IFF_IFLAG); \ | REG8 tmp; \ |
| } | GET_PC_BYTE(tmp); \ |
| MCR_AND(tmp) \ | |
| } | |
| #define MCR_OR_BYTE { \ | #define MCR_LD_W(dst, src) { \ |
| BYTE tmp; \ | (dst) = (src); \ |
| GET_PC_BYTE(tmp); \ | } |
| MCR_OR(tmp) \ | |
| } | |
| #define MCR_EI { \ | #define MCR_XOR_BYTE { \ |
| UINT op; \ | REG8 tmp; \ |
| Z80_IFF &= ~(1 << IFF_IFLAG); \ | GET_PC_BYTE(tmp); \ |
| op = Z80_RDMEM(R_Z80PC); \ | MCR_XOR(tmp) \ |
| if (op != 0xfb) { \ | } |
| R_Z80PC++; \ | |
| R_Z80R++; \ | |
| Z80_COUNT(cycles_main[op]); \ | #define MCR_DI { \ |
| z80c_mainop[op](); \ | Z80_IFF |= (1 << IFF_IFLAG); \ |
| } \ | } |
| } | |
| #define MCR_OR_BYTE { \ | |
| #define MCR_CP_BYTE { \ | REG8 tmp; \ |
| BYTE tmp; \ | GET_PC_BYTE(tmp); \ |
| GET_PC_BYTE(tmp); \ | MCR_OR(tmp) \ |
| MCR_CP(tmp) \ | } |
| } | |
| #define MCR_EI { \ | |
| REG8 iff; \ | |
| SINT32 rem; \ | |
| iff = Z80_IFF; \ | |
| if (iff & (1 << IFF_IFLAG)) { \ | |
| Z80_IFF = (UINT8)(iff & (~(1 << IFF_IFLAG))); \ | |
| rem = CPU_REMCLOCK - 1; \ | |
| if ((rem < 0) || \ | |
| ((!(iff & ((1 << IFF_IRQ) | (1 << IFF_NMI)))) && \ | |
| (CPU_REQIRQ != 0))) { \ | |
| CPU_BASECLOCK -= rem; \ | |
| CPU_REMCLOCK = 1; \ | |
| } \ | |
| } \ | |
| } | |
| #define MCR_CP_BYTE { \ | |
| REG8 tmp; \ | |
| GET_PC_BYTE(tmp); \ | |
| MCR_CP(tmp) \ | |
| } | |