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| version 1.3, 2004/08/11 12:08:17 | version 1.5, 2004/08/20 23:01:16 |
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| Line 66 | Line 66 |
| #define MCR_INC(reg) { \ | #define MCR_INC(reg) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80inc_flag2[(reg)]; \ | |
| (reg)++; \ | (reg)++; \ |
| R_Z80F |= z80inc_flag[(reg)]; \ | |
| } | } |
| #define MCR_DEC(reg) { \ | #define MCR_DEC(reg) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80dec_flag2[(reg)]; \ | |
| (reg)--; \ | (reg)--; \ |
| R_Z80F |= z80dec_flag[(reg)]; \ | |
| } | } |
| #define LDB_b(reg) { \ | #define LDB_b(reg) { \ |
| Line 193 | Line 193 |
| } \ | } \ |
| } \ | } \ |
| R_Z80A = (UINT8)dst; \ | R_Z80A = (UINT8)dst; \ |
| R_Z80F = flg | ZSPtable[dst & 0xff]; \ | R_Z80F = flg | z80szp_flag[dst & 0xff]; \ |
| } | } |
| #define MCR_JRFLG(flg) { \ | #define MCR_JRFLG(flg) { \ |
| Line 226 | Line 226 |
| } | } |
| #define MCR_INC_MEM(adrs) { \ | #define MCR_INC_MEM(adrs) { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = mem_read8((adrs)); \ | tmp = mem_read8((adrs)); \ |
| tmp++; \ | |
| mem_write8((adrs), tmp); \ | |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80inc_flag[tmp]; \ | R_Z80F |= z80inc_flag2[tmp]; \ |
| mem_write8((adrs), (REG8)(tmp + 1)); \ | |
| } | } |
| #define MCR_DEC_MEM(adrs) { \ | #define MCR_DEC_MEM(adrs) { \ |
| UINT8 tmp; \ | REG8 tmp; \ |
| tmp = mem_read8((adrs)); \ | tmp = mem_read8((adrs)); \ |
| tmp--; \ | |
| mem_write8((adrs), tmp); \ | |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= z80dec_flag[tmp]; \ | R_Z80F |= z80dec_flag2[tmp]; \ |
| mem_write8((adrs), (REG8)(tmp - 1)); \ | |
| } | } |
| #define LDB_xhl_b { \ | #define LDB_xhl_b { \ |
| Line 343 | Line 341 |
| #define MCR_AND(b) { \ | #define MCR_AND(b) { \ |
| R_Z80A &= (b); \ | R_Z80A &= (b); \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | R_Z80F = z80szp_flag[R_Z80A]; \ |
| } | } |
| #define MCR_AND_XHL { \ | #define MCR_AND_XHL { \ |
| Line 354 | Line 352 |
| #define MCR_XOR(b) { \ | #define MCR_XOR(b) { \ |
| R_Z80A ^= (b); \ | R_Z80A ^= (b); \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | R_Z80F = z80szp_flag[R_Z80A]; \ |
| } | } |
| #define MCR_XOR_XHL { \ | #define MCR_XOR_XHL { \ |
| Line 366 | Line 364 |
| #define MCR_OR(b) { \ | #define MCR_OR(b) { \ |
| R_Z80A |= (b); \ | R_Z80A |= (b); \ |
| R_Z80F = ZSPtable[R_Z80A]; \ | R_Z80F = z80szp_flag[R_Z80A]; \ |
| } | } |
| #define MCR_OR_XHL { \ | #define MCR_OR_XHL { \ |
| Line 573 | Line 571 |
| Z80_IFF = (UINT8)(iff & (~(1 << IFF_IFLAG))); \ | Z80_IFF = (UINT8)(iff & (~(1 << IFF_IFLAG))); \ |
| rem = CPU_REMCLOCK - 1; \ | rem = CPU_REMCLOCK - 1; \ |
| if ((rem < 0) || \ | if ((rem < 0) || \ |
| ((!(iff & ((1 << IFF_IRQ) | (1 << IFF_NMI)))) && \ | ((!(iff & (1 << IFF_NMI))) && (CPU_REQIRQ != 0))) { \ |
| (CPU_REQIRQ != 0))) { \ | |
| CPU_BASECLOCK -= rem; \ | CPU_BASECLOCK -= rem; \ |
| CPU_REMCLOCK = 1; \ | CPU_REMCLOCK = 1; \ |
| } \ | } \ |