--- xmil/z80c/z80c.mcr 2004/08/11 12:08:17 1.3 +++ xmil/z80c/z80c.mcr 2005/02/04 06:42:14 1.6 @@ -6,16 +6,40 @@ // //---------------------------------------------------------------------------- +// #define PCCOUNTER + +#if defined(TRACE) && defined(PCCOUNTER) +extern UINT pccnt; +extern UINT pccnt2; +extern UINT pccnt3; +extern UINT lastpc; +#endif #define Z80_COUNT(clock) \ do { \ CPU_REMCLOCK -= (clock); \ } while (/*CONSTCOND*/ 0) -#define Z80IRQCHECKTERM \ - do { } while (/*CONSTCOND*/ 0) +#if defined(TRACE) && defined(PCCOUNTER) +#define GET_PC_BYTE(b) \ + do { \ + if ((lastpc ^ R_Z80PC) & 0x8000) { \ + TRACEOUT(("%.4x->%.4x", lastpc, R_Z80PC)); \ + lastpc = R_Z80PC; \ + pccnt2++; \ + } \ + pccnt++; \ + (b) = mem_read8(R_Z80PC++); \ + } while (/*CONSTCOND*/ 0) +#define GET_PC_WORD(w) \ + do { \ + pccnt3++; \ + (w) = mem_read16(R_Z80PC); \ + R_Z80PC += 2; \ + } while (/*CONSTCOND*/ 0) +#else #define GET_PC_BYTE(b) \ do { \ (b) = mem_read8(R_Z80PC++); \ @@ -26,6 +50,7 @@ (w) = mem_read16(R_Z80PC); \ R_Z80PC += 2; \ } while (/*CONSTCOND*/ 0) +#endif #define MCR_EX1(r1, r2) \ @@ -66,14 +91,14 @@ #define MCR_INC(reg) { \ R_Z80F &= C_FLAG; \ + R_Z80F |= z80inc_flag2[(reg)]; \ (reg)++; \ - R_Z80F |= z80inc_flag[(reg)]; \ } #define MCR_DEC(reg) { \ R_Z80F &= C_FLAG; \ + R_Z80F |= z80dec_flag2[(reg)]; \ (reg)--; \ - R_Z80F |= z80dec_flag[(reg)]; \ } #define LDB_b(reg) { \ @@ -193,7 +218,7 @@ } \ } \ R_Z80A = (UINT8)dst; \ - R_Z80F = flg | ZSPtable[dst & 0xff]; \ + R_Z80F = flg | z80szp_flag[dst & 0xff]; \ } #define MCR_JRFLG(flg) { \ @@ -226,21 +251,19 @@ } #define MCR_INC_MEM(adrs) { \ - UINT8 tmp; \ + REG8 tmp; \ tmp = mem_read8((adrs)); \ - tmp++; \ - mem_write8((adrs), tmp); \ R_Z80F &= C_FLAG; \ - R_Z80F |= z80inc_flag[tmp]; \ + R_Z80F |= z80inc_flag2[tmp]; \ + mem_write8((adrs), (REG8)(tmp + 1)); \ } #define MCR_DEC_MEM(adrs) { \ - UINT8 tmp; \ + REG8 tmp; \ tmp = mem_read8((adrs)); \ - tmp--; \ - mem_write8((adrs), tmp); \ R_Z80F &= C_FLAG; \ - R_Z80F |= z80dec_flag[tmp]; \ + R_Z80F |= z80dec_flag2[tmp]; \ + mem_write8((adrs), (REG8)(tmp - 1)); \ } #define LDB_xhl_b { \ @@ -275,7 +298,7 @@ #define MCR_HALT { \ R_Z80PC--; \ Z80_IFF |= (1 << IFF_HALT); \ - Z80IRQCHECKTERM; \ + CPU_REMCLOCK = 0; \ } @@ -343,7 +366,7 @@ #define MCR_AND(b) { \ R_Z80A &= (b); \ - R_Z80F = ZSPtable[R_Z80A]; \ + R_Z80F = z80szp_flag[R_Z80A]; \ } #define MCR_AND_XHL { \ @@ -354,7 +377,7 @@ #define MCR_XOR(b) { \ R_Z80A ^= (b); \ - R_Z80F = ZSPtable[R_Z80A]; \ + R_Z80F = z80szp_flag[R_Z80A]; \ } #define MCR_XOR_XHL { \ @@ -366,7 +389,7 @@ #define MCR_OR(b) { \ R_Z80A |= (b); \ - R_Z80F = ZSPtable[R_Z80A]; \ + R_Z80F = z80szp_flag[R_Z80A]; \ } #define MCR_OR_XHL { \ @@ -573,8 +596,7 @@ Z80_IFF = (UINT8)(iff & (~(1 << IFF_IFLAG))); \ rem = CPU_REMCLOCK - 1; \ if ((rem < 0) || \ - ((!(iff & ((1 << IFF_IRQ) | (1 << IFF_NMI)))) && \ - (CPU_REQIRQ != 0))) { \ + ((!(iff & (1 << IFF_NMI))) && (CPU_REQIRQ != 0))) { \ CPU_BASECLOCK -= rem; \ CPU_REMCLOCK = 1; \ } \