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| version 1.1, 2004/08/01 05:31:32 | version 1.2, 2004/08/08 14:00:56 |
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| Line 1 | Line 1 |
| #define GET_I(base) __CBW(Z80_RDMEM(R_Z80PC++)) + (base) | #define GET_I(base) LOW16((base) + mem_read8s(R_Z80PC++)) |
| #define MCR_INC_XI(base) { \ | #define MCR_INC_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| MCR_INC_MEM(adrs) \ | MCR_INC_MEM(adrs) \ |
| } | } |
| #define MCR_DEC_XI(base) { \ | #define MCR_DEC_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| MCR_DEC_MEM(adrs) \ | MCR_DEC_MEM(adrs) \ |
| } | } |
| #define MCR_LDXIBYTE(base) { \ | #define MCR_LDXIBYTE(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| Z80_WRMEM(adrs, Z80_RDMEM(R_Z80PC++)); \ | mem_write8(adrs, mem_read8(R_Z80PC++)); \ |
| } | } |
| #define MCR_LD_RXI(reg, base) { \ | #define MCR_LD_RXI(reg, base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| (reg) = Z80_RDMEM(adrs); \ | (reg) = mem_read8(adrs); \ |
| } | } |
| #define MCR_LD_XIR(reg, base) { \ | #define MCR_LD_XIR(reg, base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| Z80_WRMEM(adrs, (reg)); \ | mem_write8(adrs, (reg)); \ |
| } | } |
| #define MCR_ADD_XI(base) { \ | #define MCR_ADD_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_ADD(tmp) \ | MCR_ADD(tmp) \ |
| } | } |
| #define MCR_ADC_XI(base) { \ | #define MCR_ADC_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_ADC(tmp) \ | MCR_ADC(tmp) \ |
| } | } |
| #define MCR_SUB_XI(base) { \ | #define MCR_SUB_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_SUB(tmp) \ | MCR_SUB(tmp) \ |
| } | } |
| #define MCR_SBC_XI(base) { \ | #define MCR_SBC_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_SBC(tmp) \ | MCR_SBC(tmp) \ |
| } | } |
| #define MCR_AND_XI(base) { \ | #define MCR_AND_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_AND(tmp) \ | MCR_AND(tmp) \ |
| } | } |
| #define MCR_XOR_XI(base) { \ | #define MCR_XOR_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_XOR(tmp) \ | MCR_XOR(tmp) \ |
| } | } |
| #define MCR_OR_XI(base) { \ | #define MCR_OR_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_OR(tmp) \ | MCR_OR(tmp) \ |
| } | } |
| #define MCR_CP_XI(base) { \ | #define MCR_CP_XI(base) { \ |
| WORD adrs; \ | UINT adrs; \ |
| BYTE tmp; \ | REG8 tmp; \ |
| adrs = GET_I((base)); \ | adrs = GET_I((base)); \ |
| tmp = Z80_RDMEM(adrs); \ | tmp = mem_read8(adrs); \ |
| MCR_CP(tmp) \ | MCR_CP(tmp) \ |
| } | } |