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| version 1.1, 2004/08/01 05:31:32 | version 1.4, 2004/08/11 12:08:17 |
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| Line 1 | Line 1 |
| #define MCR_Z80INF(reg) { \ | #define MCR_Z80INF(reg) { \ |
| (reg) = iocore_inp(R_Z80BC); \ | (reg) = iocore_inp(R_Z80BC); \ |
| R_Z80F &= C_FLAG; \ | R_Z80F &= C_FLAG; \ |
| R_Z80F |= ZSPtable[(reg)]; \ | R_Z80F |= ZSPtable[(reg)]; \ |
| } | } |
| #define MCR_Z80OUT(reg) { \ | #define MCR_Z80OUT(reg) { \ |
| iocore_out(R_Z80BC, (reg)); \ | iocore_out(R_Z80BC, (reg)); \ |
| } | } |
| #define MCR_SBC_W(reg) { \ | #define MCR_SBC_W(reg) { \ |
| DWORD tmp; \ | UINT32 tmp; \ |
| tmp = (DWORD)R_Z80HL - (DWORD)(reg) \ | tmp = R_Z80HL - (reg) - (R_Z80F & 1); \ |
| - (DWORD)(R_Z80F & 1); \ | R_Z80F = N_FLAG; \ |
| R_Z80F = N_FLAG; \ | if (tmp & 0xffff0000) { \ |
| if (tmp & 0xffff0000) { \ | R_Z80F |= C_FLAG; \ |
| R_Z80F |= C_FLAG; \ | } \ |
| } \ | if (!(tmp & 0x0000ffff)) { \ |
| if (!(tmp & 0x0000ffff)) { \ | R_Z80F |= Z_FLAG; \ |
| R_Z80F |= Z_FLAG; \ | } \ |
| } \ | else if (tmp & 0x00008000) { \ |
| else if (tmp & 0x00008000) { \ | R_Z80F |= S_FLAG; \ |
| R_Z80F |= S_FLAG; \ | } \ |
| } \ | R_Z80F |= ((((R_Z80HL) ^ tmp) & ((R_Z80HL) ^ (reg))) \ |
| R_Z80F |= ((((R_Z80HL) ^ tmp) & ((R_Z80HL) ^ (reg))) \ | >> 13) & V_FLAG; \ |
| >> 13) & V_FLAG; \ | R_Z80F |= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \ |
| R_Z80F |= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \ | R_Z80HL = (UINT16)tmp; \ |
| R_Z80HL = (WORD)tmp; \ | } |
| } | |
| #define MCR_NEG { \ | |
| #define MCR_NEG { \ | UINT res; \ |
| DWORD res; \ | res = 0 - R_Z80A; \ |
| res = 0 - (DWORD)R_Z80A; \ | R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ |
| R_Z80F = z80szc_flag[res & 0x1ff] | N_FLAG; \ | R_Z80F |= (res ^ R_Z80A) & H_FLAG; \ |
| R_Z80F |= (res ^ R_Z80A) & H_FLAG; \ | R_Z80F |= ((res & R_Z80A) >> 5) & V_FLAG; \ |
| R_Z80F |= ((res & R_Z80A) >> 5) & V_FLAG; \ | R_Z80A = (UINT8)res; \ |
| R_Z80A = (BYTE)res; \ | } |
| } | |
| #define MCR_RETN { \ | |
| #define MCR_RETN { \ | Z80_IFF &= ~((1 << IFF_NMI) | (1 << IFF_IRQ)); \ |
| Z80_IFF &= ~((1 << IFF_NMI) | (1 << IFF_IRQ)); \ | MCR_RET \ |
| MCR_RET \ | } |
| } | |
| #define MCR_IM(mode) { \ | |
| #define MCR_IM(mode) { \ | R_Z80IM = (mode); \ |
| R_Z80IM = (mode); \ | } |
| } | |
| #define MCR_ADC_W(reg) { \ | |
| #define MCR_ADC_W(reg) { \ | UINT32 tmp; \ |
| DWORD tmp; \ | tmp = R_Z80HL + (reg) + (R_Z80F & 1); \ |
| tmp = (DWORD)R_Z80HL + (DWORD)(reg) \ | R_Z80F = (UINT8)(tmp >> 16); \ |
| + (DWORD)(R_Z80F & 1); \ | if (!(tmp & 0x0000ffff)) { \ |
| R_Z80F = (BYTE)(tmp >> 16); \ | R_Z80F |= Z_FLAG; \ |
| if (!(tmp & 0x0000ffff)) { \ | } \ |
| R_Z80F |= Z_FLAG; \ | else if (tmp & 0x00008000) { \ |
| } \ | R_Z80F |= S_FLAG; \ |
| else if (tmp & 0x00008000) { \ | } \ |
| R_Z80F |= S_FLAG; \ | R_Z80F |= (((tmp ^ (reg)) & (tmp ^ R_Z80HL)) >> 13) & V_FLAG; \ |
| } \ | R_Z80F |= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \ |
| R_Z80F |= (((tmp ^ (reg)) & (tmp ^ R_Z80HL)) \ | (reg) = (UINT16)tmp; \ |
| >> 13) & V_FLAG; \ | } |
| R_Z80F |= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \ | |
| (reg) = (WORD)tmp; \ | #define MCR_RETI { \ |
| } | REG8 iff; \ |
| iff = Z80_IFF; \ | |
| #define MCR_RETI { \ | if (iff & (1 << IFF_IRQ)) { \ |
| Z80_IFF &= ~(1 << IFF_IRQ); \ | Z80_IFF = (UINT8)(iff & (~(1 << IFF_IRQ))); \ |
| MCR_RET \ | if ((!(iff & ((1 << IFF_IFLAG) | (1 << IFF_NMI)))) && \ |
| } | (CPU_REQIRQ != 0)) { \ |
| CPU_BASECLOCK -= CPU_REMCLOCK; \ | |
| #define MCR_LD_RA { \ | CPU_REMCLOCK = 0; \ |
| R_Z80R = R_Z80A; \ | } \ |
| R_Z80R2 = R_Z80A; \ | } \ |
| } | MCR_RET \ |
| } | |
| #define MCR_LD_AI { \ | #define MCR_LD_RA { \ |
| R_Z80A = R_Z80I; \ | R_Z80R = R_Z80A; \ |
| R_Z80F &= C_FLAG; \ | R_Z80R2 = R_Z80A; \ |
| R_Z80F |= z80szc_flag[R_Z80I]; \ | } |
| if (!(Z80_IFF & (1 << IFF_IFLAG))) { \ | |
| R_Z80F |= V_FLAG; \ | |
| } \ | #define MCR_LD_AI { \ |
| } | R_Z80A = R_Z80I; \ |
| R_Z80F &= C_FLAG; \ | |
| #define MCR_LD_AR { \ | R_Z80F |= z80szc_flag[R_Z80I]; \ |
| R_Z80A = (R_Z80R & 0x7f) | (R_Z80R2 & 0x80); \ | if (!(Z80_IFF & (1 << IFF_IFLAG))) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F |= V_FLAG; \ |
| R_Z80F |= z80szc_flag[R_Z80A]; \ | } \ |
| if (!(Z80_IFF & (1 << IFF_IFLAG))) { \ | } |
| R_Z80F |= V_FLAG; \ | |
| } \ | #define MCR_LD_AR { \ |
| } | R_Z80A = (R_Z80R & 0x7f) | (R_Z80R2 & 0x80); \ |
| R_Z80F &= C_FLAG; \ | |
| R_Z80F |= z80szc_flag[R_Z80A]; \ | |
| #define MCR_RRD { \ | if (!(Z80_IFF & (1 << IFF_IFLAG))) { \ |
| BYTE tmp; \ | R_Z80F |= V_FLAG; \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | } \ |
| Z80_WRMEM(R_Z80HL, (tmp >> 4) | (R_Z80A << 4)); \ | } |
| R_Z80A = (R_Z80A & 0xf0) | (tmp & 0x0f); \ | |
| R_Z80F &= C_FLAG; \ | |
| R_Z80F |= ZSPtable[R_Z80A]; \ | #define MCR_RRD { \ |
| } | REG8 tmp; \ |
| tmp = mem_read8(R_Z80HL); \ | |
| #define MCR_RLD { \ | mem_write8(R_Z80HL, (REG8)((tmp >> 4) | (R_Z80A << 4))); \ |
| BYTE tmp; \ | R_Z80A = (R_Z80A & 0xf0) | (tmp & 0x0f); \ |
| tmp = Z80_RDMEM(R_Z80HL); \ | R_Z80F &= C_FLAG; \ |
| Z80_WRMEM(R_Z80HL, (tmp & 0x0f) | (R_Z80A << 4)); \ | R_Z80F |= ZSPtable[R_Z80A]; \ |
| R_Z80A = (tmp & 0xf0) | (R_Z80A >> 4); \ | } |
| R_Z80F &= C_FLAG; \ | |
| R_Z80F |= ZSPtable[R_Z80A]; \ | #define MCR_RLD { \ |
| } | REG8 tmp; \ |
| tmp = mem_read8(R_Z80HL); \ | |
| mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f))); \ | |
| #define MCR_Z80IN0 { \ | R_Z80A = (R_Z80A & 0xf0) | (tmp >> 4); \ |
| BYTE tmp; \ | R_Z80F &= C_FLAG; \ |
| tmp = iocore_inp(R_Z80BC); \ | R_Z80F |= ZSPtable[R_Z80A]; \ |
| R_Z80F &= C_FLAG; \ | } |
| R_Z80F |= ZSPtable[tmp]; \ | |
| } | |
| #define MCR_Z80IN0 { \ | |
| REG8 tmp; \ | |
| #define MCR_LDI { \ | tmp = iocore_inp(R_Z80BC); \ |
| BYTE tmp; \ | R_Z80F &= C_FLAG; \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | R_Z80F |= ZSPtable[tmp]; \ |
| Z80_WRMEM(R_Z80DE++, tmp); \ | } |
| R_Z80F &= 0xe9; \ | |
| R_Z80BC--; \ | |
| if (R_Z80BC) { \ | #define MCR_LDI { \ |
| R_Z80F |= V_FLAG; \ | REG8 tmp; \ |
| } \ | tmp = mem_read8(R_Z80HL++); \ |
| } | mem_write8(R_Z80DE++, tmp); \ |
| R_Z80F &= 0xe9; \ | |
| #define MCR_CPI { \ | R_Z80BC--; \ |
| BYTE tmp, diff; \ | if (R_Z80BC) { \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | R_Z80F |= V_FLAG; \ |
| R_Z80F &= C_FLAG; \ | } \ |
| diff = R_Z80A - tmp; \ | } |
| R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ | |
| R_Z80F |= z80szc_flag[diff]; \ | #define MCR_CPI { \ |
| R_Z80F |= N_FLAG; \ | REG8 tmp; \ |
| R_Z80BC--; \ | REG8 diff; \ |
| if (R_Z80BC) { \ | tmp = mem_read8(R_Z80HL++); \ |
| R_Z80F |= V_FLAG; \ | R_Z80F &= C_FLAG; \ |
| } \ | diff = R_Z80A - tmp; \ |
| } | R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ |
| R_Z80F |= z80szc_flag[LOW8(diff)]; \ | |
| #define MCR_INI { \ | R_Z80F |= N_FLAG; \ |
| BYTE tmp; \ | R_Z80BC--; \ |
| tmp = iocore_inp(R_Z80BC); \ | if (R_Z80BC) { \ |
| Z80_WRMEM(R_Z80HL++, tmp); \ | R_Z80F |= V_FLAG; \ |
| R_Z80F = N_FLAG; \ | } \ |
| R_Z80B--; \ | } |
| if (!R_Z80B) { \ | |
| R_Z80F |= Z_FLAG; \ | #define MCR_INI { \ |
| } \ | REG8 tmp; \ |
| } | tmp = iocore_inp(R_Z80BC); \ |
| mem_write8(R_Z80HL++, tmp); \ | |
| #define MCR_OUTI { \ | R_Z80F = N_FLAG; \ |
| BYTE tmp; \ | R_Z80B--; \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | if (!R_Z80B) { \ |
| R_Z80F = N_FLAG; \ | R_Z80F |= Z_FLAG; \ |
| R_Z80B--; \ | } \ |
| if (!R_Z80B) { \ | } |
| R_Z80F |= Z_FLAG; \ | |
| } \ | #define MCR_OUTI { \ |
| iocore_out(R_Z80BC, tmp); \ | REG8 tmp; \ |
| } | tmp = mem_read8(R_Z80HL++); \ |
| R_Z80F = N_FLAG; \ | |
| #define MCR_LDD { \ | R_Z80B--; \ |
| BYTE tmp; \ | if (!R_Z80B) { \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | R_Z80F |= Z_FLAG; \ |
| Z80_WRMEM(R_Z80DE--, tmp); \ | } \ |
| R_Z80F &= 0xe9; \ | iocore_out(R_Z80BC, tmp); \ |
| R_Z80BC--; \ | } |
| if (R_Z80BC) { \ | |
| R_Z80F |= V_FLAG; \ | #define MCR_LDD { \ |
| } \ | REG8 tmp; \ |
| } | tmp = mem_read8(R_Z80HL--); \ |
| mem_write8(R_Z80DE--, tmp); \ | |
| #define MCR_CPD { \ | R_Z80F &= 0xe9; \ |
| BYTE tmp, diff; \ | R_Z80BC--; \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | if (R_Z80BC) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F |= V_FLAG; \ |
| diff = R_Z80A - tmp; \ | } \ |
| R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ | } |
| R_Z80F |= z80szc_flag[diff]; \ | |
| R_Z80F |= N_FLAG; \ | #define MCR_CPD { \ |
| R_Z80BC--; \ | REG8 tmp; \ |
| if (R_Z80BC) { \ | REG8 diff; \ |
| R_Z80F |= V_FLAG; \ | tmp = mem_read8(R_Z80HL--); \ |
| } \ | R_Z80F &= C_FLAG; \ |
| } | diff = R_Z80A - tmp; \ |
| R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ | |
| #define MCR_IND { \ | R_Z80F |= z80szc_flag[LOW8(diff)]; \ |
| BYTE tmp; \ | R_Z80F |= N_FLAG; \ |
| tmp = iocore_inp(R_Z80BC); \ | R_Z80BC--; \ |
| Z80_WRMEM(R_Z80HL--, tmp); \ | if (R_Z80BC) { \ |
| R_Z80F = N_FLAG; \ | R_Z80F |= V_FLAG; \ |
| R_Z80B--; \ | } \ |
| if (!R_Z80B) { \ | } |
| R_Z80F |= Z_FLAG; \ | |
| } \ | #define MCR_IND { \ |
| } | REG8 tmp; \ |
| tmp = iocore_inp(R_Z80BC); \ | |
| #define MCR_OUTD { \ | mem_write8(R_Z80HL--, tmp); \ |
| BYTE tmp; \ | R_Z80F = N_FLAG; \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | R_Z80B--; \ |
| R_Z80F = N_FLAG; \ | if (!R_Z80B) { \ |
| R_Z80B--; \ | R_Z80F |= Z_FLAG; \ |
| if (!R_Z80B) { \ | } \ |
| R_Z80F |= Z_FLAG; \ | } |
| } \ | |
| iocore_out(R_Z80BC, tmp); \ | #define MCR_OUTD { \ |
| } | REG8 tmp; \ |
| tmp = mem_read8(R_Z80HL--); \ | |
| #define MCR_LDIR { \ | R_Z80F = N_FLAG; \ |
| BYTE tmp; \ | R_Z80B--; \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | if (!R_Z80B) { \ |
| Z80_WRMEM(R_Z80DE++, tmp); \ | R_Z80F |= Z_FLAG; \ |
| R_Z80F &= 0xe9; \ | } \ |
| R_Z80BC--; \ | iocore_out(R_Z80BC, tmp); \ |
| if (R_Z80BC) { \ | } |
| R_Z80F |= V_FLAG; \ | |
| Z80_COUNT(5); \ | #define MCR_LDIR { \ |
| R_Z80PC -= 2; \ | REG8 tmp; \ |
| } \ | tmp = mem_read8(R_Z80HL++); \ |
| } | mem_write8(R_Z80DE++, tmp); \ |
| R_Z80F &= 0xe9; \ | |
| #define MCR_CPIR { \ | R_Z80BC--; \ |
| BYTE tmp, diff; \ | if (R_Z80BC) { \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | R_Z80F |= V_FLAG; \ |
| R_Z80F &= C_FLAG; \ | Z80_COUNT(5); \ |
| diff = R_Z80A - tmp; \ | R_Z80PC -= 2; \ |
| R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ | } \ |
| R_Z80F |= z80szc_flag[diff]; \ | } |
| if (!diff) { \ | |
| R_Z80F |= N_FLAG; \ | #define MCR_CPIR { \ |
| if (--R_Z80BC) { \ | REG8 tmp; \ |
| R_Z80F |= V_FLAG; \ | REG8 diff; \ |
| } \ | tmp = mem_read8(R_Z80HL++); \ |
| } \ | R_Z80F &= C_FLAG; \ |
| else { \ | diff = R_Z80A - tmp; \ |
| if (--R_Z80BC) { \ | R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ |
| R_Z80F |= V_FLAG; \ | R_Z80F |= z80szc_flag[LOW8(diff)]; \ |
| Z80_COUNT(5); \ | if (!diff) { \ |
| R_Z80PC -= 2; \ | R_Z80F |= N_FLAG; \ |
| } \ | if (--R_Z80BC) { \ |
| } \ | R_Z80F |= V_FLAG; \ |
| } | } \ |
| } \ | |
| #define MCR_INIR { \ | else { \ |
| BYTE tmp; \ | if (--R_Z80BC) { \ |
| tmp = iocore_inp(R_Z80BC); \ | R_Z80F |= V_FLAG; \ |
| Z80_WRMEM(R_Z80HL++, tmp); \ | Z80_COUNT(5); \ |
| if (--R_Z80B) { \ | R_Z80PC -= 2; \ |
| R_Z80F = N_FLAG; \ | } \ |
| Z80_COUNT(5); \ | } \ |
| R_Z80PC -= 2; \ | } |
| } \ | |
| else { \ | #define MCR_INIR { \ |
| R_Z80F = (N_FLAG | Z_FLAG); \ | REG8 tmp; \ |
| } \ | tmp = iocore_inp(R_Z80BC); \ |
| } | mem_write8(R_Z80HL++, tmp); \ |
| if (--R_Z80B) { \ | |
| #define MCR_OTIR { \ | R_Z80F = N_FLAG; \ |
| BYTE tmp; \ | Z80_COUNT(5); \ |
| tmp = Z80_RDMEM(R_Z80HL++); \ | R_Z80PC -= 2; \ |
| if (--R_Z80B) { \ | } \ |
| R_Z80F = N_FLAG; \ | else { \ |
| Z80_COUNT(5); \ | R_Z80F = (N_FLAG | Z_FLAG); \ |
| R_Z80PC -= 2; \ | } \ |
| } \ | } |
| else { \ | |
| R_Z80F = (N_FLAG | Z_FLAG); \ | #define MCR_OTIR { \ |
| } \ | REG8 tmp; \ |
| iocore_out(R_Z80BC, tmp); \ | tmp = mem_read8(R_Z80HL++); \ |
| } | if (--R_Z80B) { \ |
| R_Z80F = N_FLAG; \ | |
| #define MCR_LDDR { \ | Z80_COUNT(5); \ |
| BYTE tmp; \ | R_Z80PC -= 2; \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | } \ |
| Z80_WRMEM(R_Z80DE--, tmp); \ | else { \ |
| R_Z80F &= 0xe9; \ | R_Z80F = (N_FLAG | Z_FLAG); \ |
| R_Z80BC--; \ | } \ |
| if (R_Z80BC) { \ | iocore_out(R_Z80BC, tmp); \ |
| R_Z80F |= V_FLAG; \ | } |
| Z80_COUNT(5); \ | |
| R_Z80PC -= 2; \ | #define MCR_LDDR { \ |
| } \ | REG8 tmp; \ |
| } | tmp = mem_read8(R_Z80HL--); \ |
| mem_write8(R_Z80DE--, tmp); \ | |
| #define MCR_CPDR { \ | R_Z80F &= 0xe9; \ |
| BYTE tmp, diff; \ | R_Z80BC--; \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | if (R_Z80BC) { \ |
| R_Z80F &= C_FLAG; \ | R_Z80F |= V_FLAG; \ |
| diff = R_Z80A - tmp; \ | Z80_COUNT(5); \ |
| R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ | R_Z80PC -= 2; \ |
| R_Z80F |= z80szc_flag[diff]; \ | } \ |
| if (!diff) { \ | } |
| R_Z80F |= N_FLAG; \ | |
| if (--R_Z80BC) { \ | #define MCR_CPDR { \ |
| R_Z80F |= V_FLAG; \ | REG8 tmp; \ |
| } \ | REG8 diff; \ |
| } \ | tmp = mem_read8(R_Z80HL--); \ |
| else { \ | R_Z80F &= C_FLAG; \ |
| if (--R_Z80BC) { \ | diff = R_Z80A - tmp; \ |
| R_Z80F |= V_FLAG; \ | R_Z80F |= (diff ^ R_Z80A ^ tmp) & H_FLAG; \ |
| Z80_COUNT(5); \ | R_Z80F |= z80szc_flag[LOW8(diff)]; \ |
| R_Z80PC -= 2; \ | if (!diff) { \ |
| } \ | R_Z80F |= N_FLAG; \ |
| } \ | if (--R_Z80BC) { \ |
| } | R_Z80F |= V_FLAG; \ |
| } \ | |
| #define MCR_INDR { \ | } \ |
| REG8 tmp; \ | else { \ |
| tmp = iocore_inp(R_Z80BC); \ | if (--R_Z80BC) { \ |
| Z80_WRMEM(R_Z80HL--, tmp); \ | R_Z80F |= V_FLAG; \ |
| if (--R_Z80B) { \ | Z80_COUNT(5); \ |
| R_Z80F = N_FLAG; \ | R_Z80PC -= 2; \ |
| Z80_COUNT(5); \ | } \ |
| R_Z80PC -= 2; \ | } \ |
| } \ | } |
| else { \ | |
| R_Z80F = (N_FLAG | Z_FLAG); \ | #define MCR_INDR { \ |
| } \ | REG8 tmp; \ |
| } | tmp = iocore_inp(R_Z80BC); \ |
| mem_write8(R_Z80HL--, tmp); \ | |
| #define MCR_OTDR { \ | if (--R_Z80B) { \ |
| REG8 tmp; \ | R_Z80F = N_FLAG; \ |
| tmp = Z80_RDMEM(R_Z80HL--); \ | Z80_COUNT(5); \ |
| if (--R_Z80B) { \ | R_Z80PC -= 2; \ |
| R_Z80F = N_FLAG; \ | } \ |
| Z80_COUNT(5); \ | else { \ |
| R_Z80PC -= 2; \ | R_Z80F = (N_FLAG | Z_FLAG); \ |
| } \ | } \ |
| else { \ | } |
| R_Z80F = (N_FLAG | Z_FLAG); \ | |
| } \ | #define MCR_OTDR { \ |
| iocore_out(R_Z80BC, tmp); \ | REG8 tmp; \ |
| tmp = mem_read8(R_Z80HL--); \ | |
| if (--R_Z80B) { \ | |
| R_Z80F = N_FLAG; \ | |
| Z80_COUNT(5); \ | |
| R_Z80PC -= 2; \ | |
| } \ | |
| else { \ | |
| R_Z80F = (N_FLAG | Z_FLAG); \ | |
| } \ | |
| iocore_out(R_Z80BC, tmp); \ | |
| } | } |