xmil/z80c/z80c_s.mcr - diff

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Diff for /xmil/z80c/z80c_s.mcr between versions 1.5 and 1.8

version 1.5, 2004/08/14 12:16:18	version 1.8, 2004/08/20 23:01:16
Line 2	Line 2
#define MCR_Z80INF(reg) { \	#define MCR_Z80INF(reg) { \
(reg) = iocore_inp(R_Z80BC); \	(reg) = iocore_inp(R_Z80BC); \
R_Z80F &= C_FLAG; \	R_Z80F &= C_FLAG; \
R_Z80F \|= ZSPtable[(reg)]; \	R_Z80F \|= z80szp_flag[(reg)]; \
}	}

#define MCR_Z80OUT(reg) { \	#define MCR_Z80OUT(reg) { \
Line 58	Line 58
} \	} \
R_Z80F \|= (((tmp ^ (reg)) & (tmp ^ R_Z80HL)) >> 13) & V_FLAG; \	R_Z80F \|= (((tmp ^ (reg)) & (tmp ^ R_Z80HL)) >> 13) & V_FLAG; \
R_Z80F \|= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \	R_Z80F \|= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG; \
(reg) = (UINT16)tmp; \	R_Z80HL = (UINT16)tmp; \
}	}

#define MCR_RETI { \	#define MCR_RETI { \
CPU_IRQ = CPU_IRQ & (CPU_IRQ - 1); \	ievent_eoi(); \
if ((!(Z80_IFF & ((1 << IFF_IFLAG) \| (1 << IFF_NMI)))) && \
(CPU_REQIRQ != 0)) { \
CPU_BASECLOCK -= CPU_REMCLOCK; \
CPU_REMCLOCK = 0; \
} \
MCR_RET \	MCR_RET \
}	}

Line 102	Line 97
mem_write8(R_Z80HL, (REG8)((tmp >> 4) \| (R_Z80A << 4))); \	mem_write8(R_Z80HL, (REG8)((tmp >> 4) \| (R_Z80A << 4))); \
R_Z80A = (R_Z80A & 0xf0) \| (tmp & 0x0f); \	R_Z80A = (R_Z80A & 0xf0) \| (tmp & 0x0f); \
R_Z80F &= C_FLAG; \	R_Z80F &= C_FLAG; \
R_Z80F \|= ZSPtable[R_Z80A]; \	R_Z80F \|= z80szp_flag[R_Z80A]; \
}	}

#define MCR_RLD { \	#define MCR_RLD { \
Line 111	Line 106
mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f))); \	mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f))); \
R_Z80A = (R_Z80A & 0xf0) \| (tmp >> 4); \	R_Z80A = (R_Z80A & 0xf0) \| (tmp >> 4); \
R_Z80F &= C_FLAG; \	R_Z80F &= C_FLAG; \
R_Z80F \|= ZSPtable[R_Z80A]; \	R_Z80F \|= z80szp_flag[R_Z80A]; \
}	}


Line 119	Line 114
REG8 tmp; \	REG8 tmp; \
tmp = iocore_inp(R_Z80BC); \	tmp = iocore_inp(R_Z80BC); \
R_Z80F &= C_FLAG; \	R_Z80F &= C_FLAG; \
R_Z80F \|= ZSPtable[tmp]; \	R_Z80F \|= z80szp_flag[tmp]; \
}	}

RetroPC.NET-CVS <cvs@retropc.net>

Removed from v.1.5
changed lines
	Added in v.1.8