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version 1.7, 2004/08/18 17:15:35
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version 1.8, 2004/08/20 23:01:16
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| #define MCR_Z80INF(reg) { \ |
#define MCR_Z80INF(reg) { \ |
| (reg) = iocore_inp(R_Z80BC); \ |
(reg) = iocore_inp(R_Z80BC); \ |
| R_Z80F &= C_FLAG; \ |
R_Z80F &= C_FLAG; \ |
| R_Z80F |= ZSPtable[(reg)]; \ |
R_Z80F |= z80szp_flag[(reg)]; \ |
| } |
} |
| |
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| #define MCR_Z80OUT(reg) { \ |
#define MCR_Z80OUT(reg) { \ |
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| mem_write8(R_Z80HL, (REG8)((tmp >> 4) | (R_Z80A << 4))); \ |
mem_write8(R_Z80HL, (REG8)((tmp >> 4) | (R_Z80A << 4))); \ |
| R_Z80A = (R_Z80A & 0xf0) | (tmp & 0x0f); \ |
R_Z80A = (R_Z80A & 0xf0) | (tmp & 0x0f); \ |
| R_Z80F &= C_FLAG; \ |
R_Z80F &= C_FLAG; \ |
| R_Z80F |= ZSPtable[R_Z80A]; \ |
R_Z80F |= z80szp_flag[R_Z80A]; \ |
| } |
} |
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| #define MCR_RLD { \ |
#define MCR_RLD { \ |
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| mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f))); \ |
mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f))); \ |
| R_Z80A = (R_Z80A & 0xf0) | (tmp >> 4); \ |
R_Z80A = (R_Z80A & 0xf0) | (tmp >> 4); \ |
| R_Z80F &= C_FLAG; \ |
R_Z80F &= C_FLAG; \ |
| R_Z80F |= ZSPtable[R_Z80A]; \ |
R_Z80F |= z80szp_flag[R_Z80A]; \ |
| } |
} |
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| REG8 tmp; \ |
REG8 tmp; \ |
| tmp = iocore_inp(R_Z80BC); \ |
tmp = iocore_inp(R_Z80BC); \ |
| R_Z80F &= C_FLAG; \ |
R_Z80F &= C_FLAG; \ |
| R_Z80F |= ZSPtable[tmp]; \ |
R_Z80F |= z80szp_flag[tmp]; \ |
| } |
} |
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