--- xmil/z80c/z80c_s.mcr	2004/08/11 12:08:17	1.4
+++ xmil/z80c/z80c_s.mcr	2004/08/20 23:01:16	1.8
@@ -2,7 +2,7 @@
 #define	MCR_Z80INF(reg) {												\
 		(reg) = iocore_inp(R_Z80BC);									\
 		R_Z80F &= C_FLAG;												\
-		R_Z80F |= ZSPtable[(reg)];										\
+		R_Z80F |= z80szp_flag[(reg)];									\
 	}
 
 #define	MCR_Z80OUT(reg) {												\
@@ -38,7 +38,7 @@
 	}
 
 #define	MCR_RETN {														\
-		Z80_IFF &= ~((1 << IFF_NMI) | (1 << IFF_IRQ));					\
+		Z80_IFF &= ~(1 << IFF_NMI);										\
 		MCR_RET															\
 	}
 
@@ -58,20 +58,11 @@
 		}																\
 		R_Z80F |= (((tmp ^ (reg)) & (tmp ^ R_Z80HL)) >> 13) & V_FLAG;	\
 		R_Z80F |= ((R_Z80HL ^ tmp ^ (reg)) >> 8) & H_FLAG;				\
-		(reg) = (UINT16)tmp;											\
+		R_Z80HL = (UINT16)tmp;											\
 	}
 
 #define MCR_RETI {														\
-		REG8 iff;														\
-		iff = Z80_IFF;													\
-		if (iff & (1 << IFF_IRQ)) {										\
-			Z80_IFF = (UINT8)(iff & (~(1 << IFF_IRQ)));					\
-			if ((!(iff & ((1 << IFF_IFLAG) | (1 << IFF_NMI)))) &&		\
-				(CPU_REQIRQ != 0)) {									\
-				CPU_BASECLOCK -= CPU_REMCLOCK;							\
-				CPU_REMCLOCK = 0;										\
-			}															\
-		}																\
+		ievent_eoi();													\
 		MCR_RET															\
 	}
 
@@ -106,7 +97,7 @@
 		mem_write8(R_Z80HL, (REG8)((tmp >> 4) | (R_Z80A << 4)));		\
 		R_Z80A = (R_Z80A & 0xf0) | (tmp & 0x0f);						\
 		R_Z80F &= C_FLAG;												\
-		R_Z80F |= ZSPtable[R_Z80A];										\
+		R_Z80F |= z80szp_flag[R_Z80A];									\
 	}
 
 #define MCR_RLD {														\
@@ -115,7 +106,7 @@
 		mem_write8(R_Z80HL, (REG8)((tmp << 4) + (R_Z80A & 0x0f)));		\
 		R_Z80A = (R_Z80A & 0xf0) | (tmp >> 4);							\
 		R_Z80F &= C_FLAG;												\
-		R_Z80F |= ZSPtable[R_Z80A];										\
+		R_Z80F |= z80szp_flag[R_Z80A];									\
 	}
 
 
@@ -123,7 +114,7 @@
 		REG8 tmp;														\
 		tmp = iocore_inp(R_Z80BC);										\
 		R_Z80F &= C_FLAG;												\
-		R_Z80F |= ZSPtable[tmp];										\
+		R_Z80F |= z80szp_flag[tmp];										\
 	}