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| version 1.9, 2004/08/14 12:16:18 | version 1.12, 2008/06/02 20:07:32 |
|---|---|
| Line 7 | Line 7 |
| void z80dmap(void) { | void z80dmap(void) { |
| UINT16 *off1; | DMACNT *cnt1; |
| UINT16 *off2; | DMACNT *cnt2; |
| REG8 flag1; | |
| REG8 flag2; | |
| UINT addr; | UINT addr; |
| REG8 dat; | REG8 dat; |
| REG8 flag1; | |
| REG8 flag2; | |
| if (!dma.working) { | #if !defined(DMAS_STOIC) |
| if (!dma.working) | |
| #else | |
| if (!(dma.flag & DMAF_WORKING)) | |
| #endif | |
| { | |
| return; | return; |
| } | } |
| if (dma.WR[0] & 4) { | if (dma.WR0 & 4) { |
| off1 = &dma.CNT_A.w; | cnt1 = &dma.cnt_a; |
| flag1 = dma.WR[1]; | cnt2 = &dma.cnt_b; |
| off2 = &dma.CNT_B.w; | |
| flag2 = dma.WR[2]; | |
| } | } |
| else { | else { |
| off2 = &dma.CNT_A.w; | cnt2 = &dma.cnt_a; |
| flag2 = dma.WR[1]; | cnt1 = &dma.cnt_b; |
| off1 = &dma.CNT_B.w; | |
| flag1 = dma.WR[2]; | |
| } | } |
| do { // dma_lp | flag1 = cnt1->b.flag; |
| if (dma.increment) { | flag2 = cnt2->b.flag; |
| do { /* dma_lp */ | |
| CPU_REMCLOCK -= 6; | |
| #if !defined(DMAS_STOIC) | |
| if (dma.increment) | |
| #else | |
| if (dma.flag & DMAF_INCREMENT) | |
| #endif | |
| { | |
| if (!(flag1 & 0x20)) { | if (!(flag1 & 0x20)) { |
| *off1 += (flag1 & 0x10)?1:-1; | cnt1->w.addr += (flag1 & 0x10)?1:-1; |
| } | } |
| if (!(flag2 & 0x20)) { | if (!(flag2 & 0x20)) { |
| *off2 += (flag2 & 0x10)?1:-1; | cnt2->w.addr += (flag2 & 0x10)?1:-1; |
| } | } |
| } | } |
| dma.increment = 1; | else { |
| addr = *off1; | #if !defined(DMAS_STOIC) |
| dma.increment = 1; | |
| #else | |
| dma.flag |= DMAF_INCREMENT; | |
| #endif | |
| } | |
| addr = cnt1->w.addr; | |
| if (flag1 & 8) { | if (flag1 & 8) { |
| dat = iocore_inp(addr); | dat = iocore_inp(addr); |
| /* TRACEOUT(("dma r %.4x - %.2x", addr, dat)); */ | |
| } | } |
| else { | else { |
| dat = z80mem_read8(addr); | dat = z80mem_read8(addr); |
| } | } |
| if (dma.cmd & 1) { | if (dma.WR0 & 2) { |
| addr = *off2; | if (!((dat ^ dma.MACH_BYT) & (~dma.MASK_BYT))) { |
| #if !defined(DMAS_STOIC) | |
| dma.working = FALSE; | |
| dma.MACH_FLG = 1; | |
| #else | |
| dma.flag &= ~(DMAF_WORKING | DMAF_MACH); | |
| #endif | |
| } | |
| } | |
| if (dma.WR0 & 1) { | |
| addr = cnt2->w.addr; | |
| if (flag2 & 8) { | if (flag2 & 8) { |
| iocore_out(addr, dat); | iocore_out(addr, dat); |
| } | } |
| else { | else { |
| TRACEOUT(("dma->%.4x", addr)); | |
| z80mem_write8(addr, dat); | z80mem_write8(addr, dat); |
| } | /* TRACEOUT(("dma w %.4x - %.2x", addr, dat)); */ |
| } | |
| if (dma.cmd & 2) { | |
| if (!((dat ^ dma.MACH_BYT) & (~dma.MASK_BYT))) { | |
| dma.working = FALSE; | |
| dma.MACH_FLG = 1; | |
| } | } |
| } | } |
| dma.BYT_N.w++; | dma.leng.w.n++; |
| if (dma.BYT_N.w == 0) { | if (dma.leng.w.n == 0) { |
| #if !defined(DMAS_STOIC) | |
| dma.working = FALSE; | dma.working = FALSE; |
| dma.ENDB_FLG = 1; | dma.ENDB_FLG = 1; |
| goto intr; | #else |
| dma.flag &= ~(DMAF_WORKING | DMAF_ENDB); | |
| #endif | |
| } | } |
| if ((dma.BYT_L.w) && (dma.BYT_L.w != 0xffff) && (dma.BYT_N.w >= (dma.BYT_L.w + 1))) { | else if ((dma.leng.w.l) && ((dma.leng.w.n - 1) >= dma.leng.w.l)) { |
| #if !defined(DMAS_STOIC) | |
| dma.working = FALSE; | dma.working = FALSE; |
| dma.ENDB_FLG = 1; | dma.ENDB_FLG = 1; |
| #else | |
| dma.flag &= ~(DMAF_WORKING | DMAF_ENDB); | |
| #endif | |
| } | |
| #if !defined(DMAS_STOIC) | |
| if (!dma.working) | |
| #else | |
| if (!(dma.flag & DMAF_WORKING)) | |
| #endif | |
| { | |
| goto intr; | goto intr; |
| } | } |
| if (!dma.working) { | |
| return; | |
| } | |
| } while(dma.mode); | } while(dma.mode); |
| return; | return; |