--- xmil/z80c/z80dmap.c 2004/08/05 11:30:13 1.3 +++ xmil/z80c/z80dmap.c 2008/06/02 20:07:32 1.12 @@ -2,119 +2,120 @@ #include "z80core.h" #include "pccore.h" #include "iocore.h" +#include "ievent.h" void z80dmap(void) { - REG8 r; - UINT16 *off1; - UINT16 *off2; - REG8 flag1; - REG8 flag2; + DMACNT *cnt1; + DMACNT *cnt2; UINT addr; REG8 dat; - REG8 vect; + REG8 flag1; + REG8 flag2; - r = dma.DMA_CMND; - if ((r & 3) == 0) return; - if (dma.DMA_ENBL == 0) return; - if (dma.ENDB_FLG != 0) return; - if (r & 2) { - if (dma.MACH_FLG != 0) return; - } - if (dma.DMA_MODE != 1) { - if ((dma.WR[5] ^ dma.DMA_REDY) & 8) return; +#if !defined(DMAS_STOIC) + if (!dma.working) +#else + if (!(dma.flag & DMAF_WORKING)) +#endif + { + return; } - if (dma.WR[0] & 4) { - off1 = &dma.CNT_A.w; - flag1 = dma.WR[1]; - off2 = &dma.CNT_B.w; - flag2 = dma.WR[2]; + if (dma.WR0 & 4) { + cnt1 = &dma.cnt_a; + cnt2 = &dma.cnt_b; } else { - off2 = &dma.CNT_A.w; - flag2 = dma.WR[1]; - off1 = &dma.CNT_B.w; - flag1 = dma.WR[2]; + cnt2 = &dma.cnt_a; + cnt1 = &dma.cnt_b; } - do { // dma_lp - if (dma.ENDB_FLG) { - break; + flag1 = cnt1->b.flag; + flag2 = cnt2->b.flag; + do { /* dma_lp */ + CPU_REMCLOCK -= 6; +#if !defined(DMAS_STOIC) + if (dma.increment) +#else + if (dma.flag & DMAF_INCREMENT) +#endif + { + if (!(flag1 & 0x20)) { + cnt1->w.addr += (flag1 & 0x10)?1:-1; + } + if (!(flag2 & 0x20)) { + cnt2->w.addr += (flag2 & 0x10)?1:-1; + } } - if ((dma.DMA_CMND & 2) && (dma.MACH_FLG)) { - break; + else { +#if !defined(DMAS_STOIC) + dma.increment = 1; +#else + dma.flag |= DMAF_INCREMENT; +#endif } - addr = *off1; + addr = cnt1->w.addr; if (flag1 & 8) { - if (addr == 0x0ffb) { - fdcdummyread = 0; - } dat = iocore_inp(addr); + /* TRACEOUT(("dma r %.4x - %.2x", addr, dat)); */ } else { - dat = Z80_RDMEM((REG16)addr); - } - if (dma.DMA_CMND & 1) { - addr = *off2; - if (flag2 & 8) { - if ((addr == 0x0ffb) && (!ppi.IO_MODE)) { - fdcdummyread = 0; - } - iocore_out(addr, dat); - } - else { - Z80_WRMEM((REG16)addr, dat); - } + dat = z80mem_read8(addr); } - if (dma.DMA_CMND & 2) { + if (dma.WR0 & 2) { if (!((dat ^ dma.MACH_BYT) & (~dma.MASK_BYT))) { +#if !defined(DMAS_STOIC) + dma.working = FALSE; dma.MACH_FLG = 1; +#else + dma.flag &= ~(DMAF_WORKING | DMAF_MACH); +#endif } } - if (dma.DMA_MODE != 1) { - dma.DMA_STOP = (dma.WR[5] ^ dma.DMA_REDY) & 8; - if (dma.DMA_STOP) { - goto dma_stop; + if (dma.WR0 & 1) { + addr = cnt2->w.addr; + if (flag2 & 8) { + iocore_out(addr, dat); + } + else { + z80mem_write8(addr, dat); + /* TRACEOUT(("dma w %.4x - %.2x", addr, dat)); */ } - } - if (!(flag1 & 0x20)) { - *off1 += (flag1 & 0x10)?1:-1; - } - if (!(flag2 & 0x20)) { - *off2 += (flag2 & 0x10)?1:-1; } -dma_stop: - dma.BYT_N.w++; - if (dma.BYT_N.w == 0) { + dma.leng.w.n++; + if (dma.leng.w.n == 0) { +#if !defined(DMAS_STOIC) + dma.working = FALSE; dma.ENDB_FLG = 1; - break; - } - if ((dma.BYT_L.w) && (dma.BYT_L.w != 0xffff) && (dma.BYT_N.w >= (dma.BYT_L.w + 1))) { +#else + dma.flag &= ~(DMAF_WORKING | DMAF_ENDB); +#endif + } + else if ((dma.leng.w.l) && ((dma.leng.w.n - 1) >= dma.leng.w.l)) { +#if !defined(DMAS_STOIC) + dma.working = FALSE; dma.ENDB_FLG = 1; - break; +#else + dma.flag &= ~(DMAF_WORKING | DMAF_ENDB); +#endif + } +#if !defined(DMAS_STOIC) + if (!dma.working) +#else + if (!(dma.flag & DMAF_WORKING)) +#endif + { + goto intr; } - } while(dma.DMA_MODE); + } while(dma.mode); + return; +intr: if (dma.INT_ENBL) { - vect = 0; - if ((dma.INT_FLG & 1) && (dma.MACH_FLG)) { - vect = 2; - } - else if ((dma.INT_FLG & 2) && (dma.ENDB_FLG)) { - vect = 4; - } - if (vect) { - if (dma.INT_FLG & 0x20) { - vect += (dma.INT_VCT & 0xf9); - } - else { - vect = dma.INT_VCT; - } - z80c_interrupt(vect); - } + ievent_set(IEVENT_DMA); } }